Onkyo DX-7555, Service Manual

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DX-7555
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-2
Q2003 : CXD3014R (CD Digital Signal Processor with Built-in RF Amplifier and
Digital Servo + Digital High & Bass Boost + CODEC) -1/4
BLOCK DIAGRAM
Timer0
Timer1
Timer2
ARC CORE
XY-Memory
DMAC
DMP
I-Cache
Memory Control System
SRAM
Sequencer ROM/RAM
APB_ARB
APB
Interface
DMACA
PCM Interface
SRC
CPU Interface
Registers
CD Interface
ECC
Memory
Memory
Magic Gate
DAC
LPF
LPF
CPU Interface
SERVO
Interface
MIRR
DFCT
FOK
SERVO Block
PWM
Generator
SERVO DSP
Selector
Digital
OUT
D/A
Interface
CD Signal Processor Block
A/D Converter
TE FE
SUM
Clock Generator
PLL1/PLL2
CPU + DSP
CODEC (ATRAC3, ATRAC-X, MP3)
CDDSP
Servo Auto
Sequencer
Digital CLV
EFM
Demodulator
Digital PLL
RF amp Block
ATT
AMP
EQ
VC
APC
Bass Boost Block
Clock
Generator
Asymmetry
Corrector
Sub Code
Processor
32K
RAM
Error
Corrector
IREQ
ACK
XLAT2
REQ
DATA2
CLOK2
DOUT
PCMD
BCK
LRCK
BCKI
PCMDI
LRCKI
VREFL
AOUT1
VREFR
AOUT2
DATA
XLAT
CLOK
SENS
SCOR
LOCK
MDP
C2PO
WFCK
XUGF
GFS
COUT
SSTP
XRST
TEST1
TRST
XTAO
XTACN
XTAI
VCTL
VPCO
XPCK
PCO
FILI
FIFO
CLTV
ASYO
ASYI
BIAS
RFACI
RFACO
RFC
EQ_IN
AC_SUM
RFDCO
LD
PDSENS
PD
MIRR
DFCT
FOK
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
TEI FEI
TEO
E F
FEO
A B
C D
VC