Onkyo DV-SP301, Service Manual

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DV-SP301
IC TERMINAL DESCRIPTION
47 VDD3_3 3.3 V power supply Power
48 VDD_PCM VDD frequency
synthesizer=1.8V Power
49 VSS_PCM VSS frequency
synthesizer=GND Power
50 VSS Ground Power
51 DAC_SCLK Sampling clock EXT_AUD_CLK O
52 DAC_PCMOUT0 PCM output 0 EXT_AUD_DATA O
Bottom side
53 DAC_PCMOUT1 PCM output 1 EXT_AUD_REQ I/O
54 DAC_PCMOUT2 PCM output 2 O
55 DAC_PCMCLK PCM clock in/out I/O
56 DAC_LRCLK Left/right clock EXT_AUD_WCLK O
57 SPDIF_OUT SPDIF output O
58 SMI_ADR[4] Address bus SDRAM O
59 SMI_ADR[5] Address bus SDRAM O
60 SMI_ADR[6] Address bus SDRAM O
61 SMI_ADR[7] Address bus SDRAM O
62 SMI_ADR[8] Address bus SDRAM O
63 SMI_ADR[9] Address bus SDRAM O
64 VDD1_8 1.8V power supply Power
65 VSS Ground Power
66 SMI_ADR[3] Address bus SDRAM O
67 SMI_ADR[2] Address bus SDRAM O
68 SMI_ADR[1] Address bus SDRAM O
69 SMI_ADR[0] Address bus SDRAM O
70 SMI_ADR[10] Address bus SDRAM O
71 SMI_ADR[11] Address bus SDRAM O
72 SMI_ADR[12] Address bus SDRAM O
73 SMI_ADR[13] Address bus SDRAM O
74 SMI_CS[0] Chip select bank 0 O
75 SMI_CS[1] Chip select bank 1 O
76 SMI_RAS RAS SDRAM O
77 SMI_CAS CAS SDRAM O
Pin
number
Pin name Main function
Alternate function
Pin
type
Input Output
PIN LIST SORTED BY FUNCTION 3