㧙
10
㧙
CR-305X
IC BLOCK DIAGRAM AND DESCRIPTIONS
V
EE
V
EE
TM3
TM5
TM2
TM3
FSET
TM6
TM4
V
CC
V
CC
V
CC
ISET
TN1-7
PS1-4
TTL
↓
IIL
IIL
↓
TTL
CC1
DFCT1
DFCT
IIL
↓
TTL
V
CC
CC1
CC2
FOK
RF
-I
CP
CB
V
CC
V
EE
V
EE
V
EE
LEVEL S
MIRR
MIRR
TGFL
LPC
IIL DATA REGISTER
INPUT SHIFT REGISTER
ADDRESS DECODER
SENS SELECTOR
OUTPUT DECODER
DFCTO
IFB1-6
BAL1-4
TOG1-4
FS1-4
TG1-2
V
CC
FS1
FS2
Charge
up
TG2
SRCH
TGU
TG2
FSET
TA
-M
V
EE
FLB
FE
-O
FE
-M
FOCUS
PHASE COMPENSATION
TRACKING
PHASE COMPENSATION
FOH
FOL
TGH
TGL
BALH
BALL
ATSC
TZC
FZC
LDON
LPCL
FOK
V
CC
FO.BIAS
WINDOW COMP.
RF SUMMING AMP
RFTC
RF
-M
RF
-O
PD
LD
V
EE
V
CC
APC
LASER POWER CONTROL
V
EE
V
CC
FE AMP
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
V
EE
TRK.GAIN
WINDOW COMP
TM1
TG1
FS4
DFCT
TA
-O
FEO
FEI
FDFCT
FGD
DFCT
E-F BALANCE
WINDOW COMP.
TGFL
BAL3
BAL4
PD1 IV
AMP
FZC COMP.
V
EE
V
CC
V
CC
TZC COMP.
ATSC
WINDOW
COMP.
TO
G
1
TO
G
2
TO
G
3
TO
G
4
BAL1
BAL2
V
EE
E IV AMP
F IV AMP
PD2 IV
AMP
PD1
PD2
FE-BIAS
F
E
EI
TEO
V
EE
LPFI
TEI
ATSC
TZC
TDFCT
VC
FZC
SL-P
SL-M
SL-O
ISET
V
CC
XLT
CLK
LOCK
DATA
XRST
C.OUT
SENS1
SENS2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
Q101:CXA1992BR (RF Signal Processing Servo Amplifier)
Block Diagram