One Stop Systems OSS-PCIe-HIB2-x8-H, User Manual

Page: 6 / 8

One Stop Systems, Inc. Host Cable Adapter User Manual
Rev. A
6
Connectors
PCIe x8 Card Edge Connector
The pins are numbered as shown with side A on the top of the centerline on the solder side of the board and side B on the bottom of
the centerline on the component side of the board.
The PCIe interface pins PETpx, PETnx, PERpx, and PERnx are named with the following convention: “PE” stands for PCIe high
speed, “T” for Transmitter, “R” for Receiver, “p” for positive (+), and “n” for negative (-). Note that adjacent differential pairs are
separated by two ground pins to manage the connector crosstalk.
Pin-out for the PCIe x8 Card Edge Connector on the Host Cable Adapter
Side B Side A
Pin #
Name Description Name Description
1 +12V 12V Power PRSNT1# Hot-Plug presence detect
2 +12V 12V Power +12V 12V Power
3 +12V 12V Power +12V 12V Power
4
GND Ground GND Ground
5 SMCLK SMBus clock JTAG2 TCK
6 SMDAT SMBus data
JTAG3 TDI (Test Data Input)
7 GND Ground JTAG4 TDO (Test Data Output)
8 +3.3V 3.3 V power JTAG5 TMS (Test Mode Select)
9 JTAG1 TRST# (Test Reset) +3.3V 3.3 V power
10 3.3Vaux 3.3 V auxiliary power +3.3V 3.3 V power
11 WAKE# Signal for link reactivation PERST# Fundamental reset
Mechanical key
12 RSVD Reserved GND Ground
13 GND Ground
14 PETp0 REFCLK
Reference clock (differential pair)
15
PETn0
Transmitter differential pair, Lane 0
GND Ground
16 GND Ground PERp0
17 PRSNT2# Hot-Plug presence detect PERn0
Receiver differential pair, Lane 0
18 GND Ground GND Ground
19 PETp1 RSVD Reserved
20 PETn1
Transmitter differential pair, Lane 1
GND Ground
21 GND Ground PERp1
22 GND Ground PERn1
Receiver differential pair, Lane 1
23 PETp2 GND Ground
24 PETn2
Transmitter differential pair, Lane 2
GND Ground
25 GND Ground PERp2
26 GND Ground PERn2
Receiver differential pair, Lane 2
27
PETp3 GND Ground
28 PETn3
Transmitter differential pair, Lane 3
GND Ground