ON Semiconductor NCV91300, User Manual

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22
Table 20. LIMITS CONFIGURATION REGISTER
Name: LIMCONF Address: 0Ch
Type: RW Default: See Register map
Trigger: N/A
D7 D6 D5 D4 D3 D2 D1 D0
IPEAK[1..0] TPWTH[1..0] ROBUSTI2C FORCERST RSTSTATUS REARM
Bit Bit Description
REARM Rearming of device after TSD / ISHORT
0: No re − arming after TSD / ISHORT
1: Re − arming active after TSD / ISHORT with no reset of I
2
C registers: FPUS (Fast power up
sequence) is initiated with previously programmed I
2
C registers values
RSTSTATUS Reset Indicator Bit
0: Must be written to 0 after register reset
1: Default (loaded after Registers reset)
FORCERST Force Reset Bit
0 = Default value. Self − cleared to 0
1: Force reset of internal registers to default
TPWTH[1..0] Thermal pre − Warning threshold settings
00 = 110 ° C
01 = 120 ° C
10 = 130 ° C
11 = 140
°
C
ROBUSTI2C I
2
C protocol setting
0 : Classic I
2
C protocol
1: Double write access I
2
C protocol
IPEAK Inductor peak current settings
00 = 3.0 A (for 2.0 A output current)
01 = 3.5 A (for 2.5 A output current)
10 = 4.0 A (for 3.0 A output current)
11 = 4.5 A (for 3.5 A output current)
ON Semiconductor is licensed by the Philips Corporation to carry the I
2
C bus protocol.