ON Semiconductor NCV7341, Manual

Page: 8 / 18

NCV7341
http://onsemi.com
8
Table 4. INTERNAL FLAGS AND THEIR VISIBILITY
Internal Flag Set Condition Reset Condition Visibility on Pin ERR
V
CC
/V
IO
Undervoltage V
CC
< V
CC(SLEEP)
longer than t
UV(VCC)
or V
IO
< V
IO(SLEEP)
longer than t
UV(VIO)
At wake − up or power − up No
V
BAT
Undervoltage V
BAT
< V
BAT(STB)
When V
BAT
recovers No
Powerup V
BAT
rises above VBAT
(PWUP)
(V
BAT
connection to the transceiver)
When normal mode is
entered
In receive − only mode. Not
going from normal mode
Wake − up When remote or local wake − up is
detected
At power − up or when normal
mode is entered or when
V
CC
/V
IO
undervoltage flag is
set
Both on ERR and RxD (both
pulled to low). In
go − to − sleep, standby and
sleep mode.
Local Wake − up When local wake − up is detected
(i.e.via pin WAKE)
At power − up or when leaving
normal mode
In normal mode before 4
consecutive dominant
symbols are sent. Then ERR
pin becomes High again
Failure Pin TxD clamped low or
overtemperature
When entering normal mode
or when RxD is Low while
TxD is high (provided all
failures disappeared)
Overtemperature condition
observable in receive − only
mode entered from normal
mode
Bus Failure
(NCV7341D20)
One of the bus lines shorted to ground
or supply during four consecutive
transmitted dominants
No bus line short (to ground
or supply) detected during
four consecutive dominant bit
transmissions
In normal mode
V
CC
/V
IO
Undervoltage Flag
The V
CC
/V
IO
undervoltage flag is set if V
CC
supply drops
below V
CC(sleep)
level for longer than t
UV(VCC)
or V
IO
supply drops below V
IO(sleep)
level for longer than t
UV(VIO)
.
If the flag is set, the transceiver enters sleep mode. After a
waiting time identical to the undervoltage detection times
t
UV(VCC)
and t
UV(VIO)
, respectively, the flag can be reset
either by a valid wake − up request or when the powerup flag
is set. During this waiting time, the wakeup detection is
blocked.
VBAT Under − voltage Flag
The flag is set when V
BAT
supply drops below V
BAT(STB)
level. The transceiver will enter the standby mode. The flag
is reset when V
BAT
supply recovers. The transceiver then
enters the mode defined by inputs STB and EN.
Power − up Flag
This flag is set when V
BAT
supply recovers after being
below V
BAT(PWUP)
level, which corresponds to a
connection of the transceiver to the battery. The V
CC
/V
IO
undervoltage flag is cleared so that the transceiver cannot
enter the Go
− to − sleep Mode, ensuring that INH Pin is high
and the external voltage regulators are activated at the
battery connection. In Receive
− only mode, the powerup
flag can be observed on the ERR Pin. The flag is reset when
Normal mode is entered.
Wake − up Flag
This flag is set when the transceiver detects a valid
wake − up request via the bus or via the WAKE Pin. Setting
the wake − up flag is blocked during the waiting time of the
V
CC
/V
IO
undervoltage flag. The wake − up flag is
immediately propagated to Pins ERR and RxD – provided
that supplies V
CC
and V
IO
are available. The wake − up flag
is reset at power − up or when V
CC
/V
IO
undervoltage occurs
or when Normal mode is entered.
Local wake − up Flag
This flag is set when a valid wake − up request through
WAKE Pin occurs. It can be observed on the ERR Pin in
normal mode. It can only be set when the powerup flag is
reset. The local wake
− up flag is reset at powerup or at
leaving Normal mode.
Failure Flag
The failure flag is set in one of the following situations:
•
TxD Pin is Low (i.e. dominant is requested by the CAN
controller) for longer than t
dom(TxD
) − Under this
condition, the transmitter is disabled so that a bus
lockup is avoided in case of an application failure
which would drive permanent dominant on the bus. The
transmitter remains disabled until the failure flag is
reset.
•
Overtemperature − If the junction temperature reaches
T
J(SD)
, the transmitter is disabled in order to protect it
from overheating and the failure flag is set. The
transmitter remains disabled until the failure flag is
reset.
The failure flag is reset when Normal mode is entered or
when TxD pin is High while RxD pin is Low. In case of
overtemperature, the failure flag is observable on pin ERR.
Bus Failure Flag (NCV7341D20)
The transmitter of the NCV7341D20 device version
allows bus failure detection. During dominant bit
transmission, a short of the CANH or CANL line to ground
or supply (V
CC
, VBAT or other) is internally detected. If the
short circuit condition lasts for four consecutive dominant