ON Semiconductor NCN9252MUGEVB User Manual Download Page 4

NCN9252MUGEVB

http://onsemi.com

4

PCB LAYOUT GUIDELINES

Electrical Layout Considerations

Implementing a high speed USB device requires paying

attention on USB lines and traces to preserve signal
integrity. The demonstration board serves as a layout
example and can support the design engineers to preserve
high speed performances.
Electrical layout guidelines are:

The bypass capacitor must be placed as close as
possible to the V

CC

 input pin for noise immunity

.

The characteristic impedance of each High Speed USB
segment must be 45 

W

.

The ground plane of the PCB will be used to determine
the characteristic impedance of each line.

All corresponding D+ / D

 line segment pairs must be

the same length.

The use of vias to route these signals should be avoided
when possible

.

The use of turns or bends to route these signal should
be avoided when possible

.

EVALUATION BOARD PCB LAYOUT

Figure 4. Evaluation Board Layout. Top Layer: Magenta. Bottom Layer: Cyan.

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