©
Semiconductor Components Industries, LLC, 2017
March, 2017
−
Rev. 3
1
Publication Order Number:
EVBUM2308/D
NB3x6x1xxG16QFNEVK
NB3x6x1xxG16QFN
OmniClock Evaluation
KitManual
Devices Supported
•
NB3H63143G (QFN16, 3.3V)
•
NB3V63143G (QFN16, 1.8V)
•
NB3H73113G (QFN16, 3.3V)
Introduction
NB3x6x1xxG16QFNEVK is an evaluation kit offering a
convenient solution for evaluating QFN16 devices.
Included are one main board, a daughter board, and a USB
cable. The main board and daughter board are 4 layer boards
with dedicated power and GND planes.
The daughter board plugs directly on to the main board
using four 4
−
pin header connectors. These connectors route
the signal, power and ground to the device on the daughter
board. The two boards correctly plug into one another in
only one orientation ensuring proper pin alignment. The
daughter board has a 16QFN socket to test NB3x6x1xxG
and NB3H73113G devices. A view of the main board with
the 16QFN daughter board is shown in Figures 1 and 2.
The Clock Cruiser Software is the GUI software
developed to be used with this evaluation kit, and can be
downloaded for free from
www.onsemi.com
. It allows the
user to set programmable parameters and generate solutions
that fit application needs. These solutions can then be
programmed in to device’s OTP memory or be temporarily
written into device registers for evaluation. For more
information on using the GUI, refer to Clock Cruiser User
Guide.
Part Description
The NB3x6x1xxG and NB3H73113G, which are
members of the OmniClock family, are versatile user
programmable clock generators designed by ON
Semiconductor with customer experience in mind. These
devices are tailored to fit into an extensive array of
applications including wearable technology, smart phones,
digital cameras, E
−
books, portable electronics, and Internet
of Things. The NB3H designated parts are powered by 3.3V
and 2.5V supplies while NB3V parts support 1.8V
operation.
These devices are One Time Programmable (OTP), low
power PLL based clock generators that accept fundamental
mode parallel resonant crystals of up to 50 MHz or a single
ended LVCMOS/LVTTL reference clock input of up to
200 MHz. The outputs can be configured as either three
single ended LVCMOS/LVTTL outputs or a combination of
one single ended output and one differential
LVPECL/LVDS/HCSL/CML output. The generated clock
output’s frequency can range between 8 kHz to 200 MHz.
Other programmable parameters include internal crystal
load capacitor, drive strength for LVCMOS outputs, output
frequency modulation controls (type, depth, modulation
rate), output phase inversion, and PLL bypass mode. The
devices are fully functional between
−
40
°
C to +85
°
C.
Figure 1. 45
5
View of Main Board with QFN16
Daughter Board
Figure 2. Top View of Main Board with QFN16
Daughter Board
www.onsemi.com
EVAL BOARD USER’S MANUAL
Downloaded from
