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MT9J003I12STCVH

GEVB

www.onsemi.com

3

Jumper Pin Locations

The jumpers on headboards start with Pin 1 on the leftmost

side of the pin. Grouped jumpers increase in pin size with each
jumper added.

Figure 5. Pin Locations for a Single Jumper. 

Pin 1 is Located at the Leftmost Side and Increases as it Moves to the Right

Pin 1

Pins 1

4

Figure 6. Pin Locations and Assignments of Grouped Jumpers. 

Pin 1 is Located at the Top-Left Corner and Increases in a Zigzag Fashion Shown in the Picture

Pins 1 and 2

Pins 3 and 4

Pins 5 and 6

Pins 7 and 8

Pins 9 and 10

Pin 1

Figure 7. EEPROM Switches in their Defaults Positions. The First Switch (A0) of SW1 is ON,

the Second Switch(A1) is ON, the Third switch (A2) is OFF, and the Fourth Switch (WP) is ON

A0

A1

A2

WP

Jumper/Header Functions & Default Positions

Table 1. JUMPERS AND HEADERS 

 

Jumper/Header No.

Jumper/Header Name

Pins

Description

JP1

CLK_SELECT

1

2 (Default)

Connects to on-board oscillator

2

3

Connects to external clock from Demo 2X board

JP2

+2V8_VAA

1

2 (Default)

Connects to on-board +2V8_VAA power supply

2

3

Connection to external power supply

JP3

+1V8_SOC

1

2 (Default)

Connects to on-board +1V8_SOC power supply

2

3

Connection to external power supply

Summary of Contents for MT9J003I12STCVH-GEVB

Page 1: ...llaneous signals Features Clock Input Default 10 MHz Crystal Oscillator Optional Demo 2X Controlled MClk Two Wire Serial Interface Selectable Base Address Parallel Interface HiSPi High Speed Serial Pixel Interface ROHS Compliant 1V8_SOC OSC_CLK I2C SOC_EXTCLK Figure 2 Block Diagram of MT9J003I12STCVH GEVB Reset Supervisor Demo2 VF HiSPi EPROM Jumper AND Gate OSC Socket Level Shifter RJ45 HiSPi Pow...

Page 2: ...L JP6 VDDIO_SOC JP5 GPIOs J6 TEST J8 CLK_SELECT JP1 EEPROM ADDR SW1 RESET SW2 ATEST J7 2V8_VAAPIX JP4 2V8_VAA JP2 1V8_SOC JP3 SHUTTER J5 ON_LED SW3 VPP J4 Bottom View Baseboard Connector P2 Baseboard Connector P1 Figure 4 Bottom View of the Evaluation Board Connectors HiSPi Connector J50 HiSPi Connector J51 ...

Page 3: ...and 2 Pins 3 and 4 Pins 5 and 6 Pins 7 and 8 Pins 9 and 10 Pin 1 Figure 7 EEPROM Switches in their Defaults Positions The First Switch A0 of SW1 is ON the Second Switch A1 is ON the Third switch A2 is OFF and the Fourth Switch WP is ON A0 A1 A2 WP Jumper Header Functions Default Positions Table 1 JUMPERS AND HEADERS Jumper Header No Jumper Header Name Pins Description JP1 CLK_SELECT 1 2 Default Co...

Page 4: ...Connects to various sensor s settings J7 ATEST Open Default For debug test J8 TEST 2 3 Default Normal operation 1 2 Test mode SW1 EEPROM ADDR P24 Open P23 Closed P27 Closed Default EEPROM Address set to 0xA8 P24 Open P23 Open P27 Closed EEPROM Address set to 0xAC P24 Closed P23 Open P27 Closed EEPROM Address set to 0xA4 P24 Closed P23 Closed P27 Closed EEPROM Address set to 0xA0 SW2 RESET N A When...

Page 5: ... support systems or any FDA Class 3 medical devices or medical devices with a similar or equivalent classification in a foreign jurisdiction or any devices intended for implantation in the human body You agree to indemnify defend and hold harmless onsemi its directors officers employees representatives agents subsidiaries affiliates distributors and assigns against any and all liabilities losses c...

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