EVBUM2516/D
www.onsemi.com
7
FET devices and additional components which are
necessary for correct operation.
Power Switch Module is designed for Silicon Power
MOFETs in small SMD package so
−
called the Power88. In
Figure 6 is Power Switch module schematic, where M2 is
the low side switch of PFC front stage, M4 and M5 create
LLC half
−
bridge stage. C3, C4, C5, C6 and C7 are HF
decoupling MLCC capacitors with same function as afore
mentioned. Q1, Q2, Q6 forms emitter followers with Vcc
decoupling capacitors C1, C2 and C41. Emitter followers
provide buffering of driving signal in case of need – they can
be assembled on purpose. Paralleled resistor
−
diode pairs
(D14–R29, D1–R1, D2–R6) set switching slopes of
MOSFETs and this way improving EMI signature.
Exchange of Power Switch Modules Important notes
– Power Switch Modules can be exchanged, but specific
conditions must be satisfied due to operation differences:
Silicon MOSFETs requirements:
•
Higher magnetizing current (compare to GaN) to
achieve ZVS
³
Lower magnetizing inductance
because of higher output capacitance
•
Maximum needed Dead
−
time up to 500ns
•
Maximum switching Frequency is limited from to 420
– 450kHz @Light
−
load
−
it is given by used MOSFET
parameters
•
Dedicated NCP1399 setting is needed for Si MOSFETs
board option
GaN FETs requirements:
•
Lower magnetizing current (compare to Si MOSFETs)
to achieve ZVS
³
Higher magnetizing inductance, less
conduction losses
•
Maximum needed Dead
−
time ~200ns
•
Frequency is limited by IC controller
•
Dedicated NCP1399 setting is needed for GaN
MOSFETs board option
To summarize: the LLC controller has to be replaced and
air gap in the LLC transformer increased when Switching
Module is changed from GaN to
³
Si type.
Control Module
– (Figures NO TAG, NO TAG, 13, 14)
integrates the PFC controller NCP1615, the LLC controller
NCP1399 and secondary side CV/CC controller NCP4353
in one PCB. Control module is designed in such a way, that
each component is placed to its dedicated controller as close
as possible. Another design strategy was to move all signal
processing components to the Control Module, except the
high voltage circuitries for example bulk voltage feedback
divider. Module also contains two optocouplers, first one
output is used for voltage feedback loop. IC1 – NCP4353
(Figure NO TAG) senses output voltage using resistor
divider R43, R44 and R45 and transfers this information via
optocoupler U3 to primary side, to the U2 – NCP1399,
which regulates switching frequency according to feedback
and current sense signals. Second optocoupler is dedicated
to output overvoltage protection (OVP). As soon as output
voltage reaches ~21V, optocoupler U4 pulls up OVP/OTP
pin of U2 and activates OVP. Output OVP level and response
is defined by zener diode D5, resistors R30, R31 and
capacitor C21.
The LLC primary stage
is formed by half
−
bridge, which
is located on the Power switch Module, split resonant tank
capacitors C15
−
C16, clamping diode D13, resonant
inductor L5 (in case of discrete resonant transformer
implementation) and transformer TR1. The resonant
capacitor voltage divided down by R20, R21, C12, C13,
C14, C19, C20, C21, C22, D11 and D12 and provides
information about transformer current for NCP1399.
Divider serves as current feedback loop and also sets adapter
output current limit.
The Synchronous Rectifier Module
(Figures 6, 17, 18)
consists of two Single N
−
Channel SO
−
8FL Logic Level
60V MOSFETs Q1 and Q2, two synchronous rectifier (SR)
controllers IC1
−
2 NCP43080 (or similar part from
NCP430x family) and HF decoupling MLCC capacitors
C3
−
8. RC snubber circuits, composed as R1
−
C1 and R2
−
C2,
are connected across the drain and the source of each
MOSFET, to protect them against voltage spikes. C9
−
11 and
R6
−
7 are components use to filtering and HF decoupling
supply voltage for both SR controllers. R4 (R9) and R5 (R8)
serve to set minimum ON and minimum OFF switching
times of SR controller. Automatic Light Load and Disable
mode (LLD pin) is input modulates the driver clamp level
and/or turns the driver off during light load conditions. This
feature helps to reduce No
−
load consumption and improves
Light
−
load efficiency. In Figure 6, the Light
−
Load
Detection Circuitry is formed by resistors R11–14, ceramic
capacitors C12, C13 and diodes D1
−
2. If there is a certain
reason to not use LLD feature, use R3 (R10) zero ohms to
disable it. Then in this situation Light
−
Load Detection
Circuitry doesn’t have to be assembled. When using
NCP4306, R3 (R10) resistors can set specific timing of
Automatic LLD or disable it fully and external Light
−
Load
Detection Circuitry is not needed anymore. For more detail
please see each device specific datasheet.
The regulation of output voltage
is ensured by the
regulator IC1–NCP4353 (see Figure NO TAG), which
provides integrated voltage feedback regulation, replacing
traditional shunt regulator. The device is capable of
detecting “no
−
load” conditions and inserts the power supply
into a low consumption OFF
−
mode. IC1 also includes a
current regulation loop in addition to voltage regulation.
These possibilities are included in design of PCBs, but
demo
−
board is not utilized them. The optocoupler U3 is
driven via resistor R29, which determines the feedback loop
gain. Resistor R46 biases the NCP4353 in case that there is
no current flowing through the optocoupler U3. The voltage
feedback loop compensation network is created by resistors
R39, R42 capacitors C24, C25. The value of output voltage
is set up by voltage divider comprised of resistors R43, R44,
R45.
