OLIMEX© 2018
STM32-H407 user's manual
CHAPTER 4 THE STM32F407ZGT6 MICROCONTROLLER
4. Introduction to the chapter
In this chapter is located the information about the heart of STM32-H407 – its Cortex-M4F
microcontroller. The information is a modified version of the datasheet provided by its
manufacturers from ST.
4.1 The STM32F407ZGT6 features
Core: ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168
MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP
instructions
Memories
1 Mbyte of Flash memory
192+4 Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory) data RAM
Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR
and NAND memories
LCD parallel interface, 8080/6800 modes
Clock, reset and supply management
1.8 V to 3.6 V application supply and I/Os
POR, PDR, PVD and BOR
4-to-26 MHz crystal oscillator
Internal 16 MHz factory-trimmed RC (1% accuracy)
32 kHz oscillator for RTC with calibration
Internal 32 kHz RC with calibration
Sleep, Stop and Standby modes
VBATsupply for RTC, 20×32 bit backup reg optional 4 KB backup SRAM
3×12-bit, 2.4 MSPS A/D converters: 24 channels and 7.2 MSPS in triple interleaved mode
2×12-bit D/A converters
General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
Up to 17 timers: up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4
IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
Debug mode
Serial wire debug (SWD) & JTAG interfaces
Cortex-M4 Embedded Trace Macrocell™
114 I/O ports with interrupt capability
Up to 15 communication interfaces
3 × I2C interfaces (SMBus/PMBus)
4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control)
3 SPIs (37.5 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via
internal audio PLL or external clock
2 × CAN interfaces (2.0B Active)
SDIO interface
Advanced connectivity
USB 2.0 full-speed device/host/OTG controller with on-chip PHY
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