
45372301TH Rev.1
2-8 /
Oki Data CONFIDENTIAL
2.5 Diagram of Signal Blocks
The operational sequence of the finisher is controlled by the Finisher control PC board (FIN).
The CPU on the PC board controls paper transportation and serial transmissions of the machine.
A block diagram of the finisher is shown below.
Fig. 2-6
MFP Interface
FEED IN PATH SNR
S1
STAPLE PAPER DETECT SNR
S1
4
FIN PWBA
CN
1
DC24V OUT
DC5V OUT
DC24V IN
DC5V IN
D
X
R
a
t
a
D
d
n
e
S
POLYSW( R72)
COM
NO
DOOR I/L SW
S15
STEP MOTOR DRIVER IC
STEP
MTR
M1
FEED IN MTR
STEP MOTOR DRIVER IC
STEP MOTOR DRIVER IC
STEP MOTOR DRIVER IC
STEP MOTOR DRIVER IC
STEP MOTOR DRIVER IC
DC MOTOR DRIVER IC
DC MOTOR DRIVER IC
DC MOTOR DRIVER
STEP
MTR
M2
FEED OUT MTR
POLYSW(R56)
POLYSW(R57)
POLYSW(R71)
POLYSW(R66)
POLYSW(R82)
POLYSW(R67)
POLYSW(R76)
POLYSW(R77)
POLYSW(R145)
STEP
MTR
M4
F JOG MTR
STEP
MTR
M5
R JOG MTR
STEP
MTR
M6
EXT. TRAY MTR
STEP
MTR
M3
PADDLE MTR
DC
MTR
M7
EJECT MTR
DC
MTR
M9
STP MTR
DC
MTR
M8
STK MTR
COM
NC
STK DN SW
S10
DC24V FOR STK UP
DC24V FOR STK DOWN
CPU
FEED EXIT SN
R
S2
F JOG HOME SNR
S4
R JOG HOME SN
R
S5
PADDLE HOME SNR
S3
EJECT HOME SNR
S7
EJECT ENCODER SN
R
S8
STK TOP SNR
S9
STACKER HOME SNR
S6
STAPLER
STAPLE LOW
S13
STAPLER READY
S12
STAPLER HOME
S11
DOOR OPEN DETECT
STK LOW DETECT
DC5V
DC24V
5V SENSOR
STEP MOTOR DRIVER IC
STEP
MTR
LEVER PATH MTR
M10
LEVER PATH HOME SNR
S1
5
Receive Data
TXD
Connect Chk1
GD
POLYSW(R81)