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Chapter 4 Electronics 19
Noise
PLL
Input Impedance
AC coupled, 10 nF into 1
MΩ
Frequency Range
0.2–7.5 kHz with a typical phase jitter
< 0.2%
Locks Onto
The fundamental or 2
nd
harmonic
ADC
Chip
TI ADS7807
Resolution
16 bits
Accuracy
±1.5 LSB max INL
Conversion Time
25
μs
DAC
Chip
TI DAC715
Resolution
16 bits
Settling Time
3
μs
Channels
1
Computer Interface
USB
Software
AES data acquisition and analysis software for Windows XP/7
Dimensions
2U 19” rack mount (3.5” / 89 mm), depth of 13.5” (343 mm), weight
6 kg.
Low Noise Input Coupler Model AUS30
Input Impedance
10
MΩ (internal band
pass filter)
Amplifier
FET input, 500 gain
Dimensions
180 mm × 105 mm × 65 mm
Low Noise Bandpass
Filter
Central Frequency
2.95 kHz
3 dB Band Width
200 Hz
20 dB Band Width
7.83 kHz
Summary of Contents for BDL450
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Page 60: ...60 Chapter 9 Troubleshooting...
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