TWR-KV31F120M Tower Module, User’s Guide, Rev. 0, 03/2014
Freescale Semiconductor Inc.
5
Hardware description
6.1
Microcontroller
The TWR-KV31F120M features the KV31F512VLL12 MCU. This 120 MHz microcontroller is part of
the Kinetis KV3x family and is implemented in a 100 LQFP package. The following table notes some of
the features of the KV31F512VLL12 MCU.
Table 1. Features of KV31F512VLL12
Feature
Description
Ultra low-power
• 11 low-power modes with power and clock gating for optimal peripheral activity and recovery
times.
• Full memory and analog operation down to 1.71 V for extended battery life
• Low-leakage wake-up unit with up to three internal modules and 8 pins as wake-up sources
in low-leakage stop (LLS) and very low-leakage stop (VLLS) modes
• Low-power timer for continual system operation in reduced power states
Flash and SRAM
• 512-KB flash featuring fast access times, high reliability, and four levels of security protection
• 96 KB of SRAM
• No user or system intervention to complete programming and erase functions, and full
operation down to 1.71 V
Mixed-signal capability
• High-speed 16-bit ADC with configurable resolution
• Single or differential output modes for improved noise rejection
• 500-ns conversion time achievable with programmable delay block triggering
• Two high-speed comparators providing fast and accurate motor over-current protection by
driving PWMs to a safe state
• Optional analog voltage reference provides an accurate reference to analog blocks and
replaces external voltage references to reduce system cost
Performance
• 120-MHz ARM Cortex-M4F core with DSP and FPU instruction set, single cycle MAC, and
single instruction multiple data (SIMD) extensions
• Up to 16 channel DMA for peripheral and memory servicing with reduced CPU loading and
faster system throughput
• Crossbar switch enables concurrent multi-master bus accesses, increasing bus bandwidth
Timing and control
• Up to four FlexTimers (FTM) with a total of 20 channels
• Hardware dead-time insertion and quadrature decoding for motor control
• Four-channel 32-bit periodic interrupt timer (PIT) provides time base for RTOS task
scheduler, or trigger source for ADC conversion and programmable delay block
Connectivity and
communications
• Four UARTs:
– one UART that supports RS232 with flow control, RS485, and ISO7816
– two UARTs that support RS232 with flow control and RS485
– one low power UART (LPUART)
• Two DSPI modules and two I
2
C modules
Reliability, safety, and
security
• Cyclic redundancy check (CRC) engine validates memory contents and communication
data, increasing system reliability
• Independently-clocked COP guards against clock skew or code runaway for fail-safe
applications such as the IEC 60730 safety standard for household appliances
• External watchdog monitor drives output pin to safe state for external components in the
event that a watchdog timeout occurs
• Included in Freescale’s product longevity program, with assured supply for a minimum of 10
years after launch
