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NXP Semiconductors
UM11134
FRDMGD3100HBIEVM half-bridge evaluation board
UM11134
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© NXP B.V. 2020. All rights reserved.
User guide
Rev. 3 — 10 February 2020
7 / 35
Figure 3. Evaluation board voltage and interface domains
Table 2. Low-voltage (LV) domain 24-pin connector definitions
Pin
Name
Function
1
AOUTL
Duty cycle encoded signal (low-side)
2
n.c.
No connection
3
CSBL
Chip select bar (low-side)
4
n.c.
No connection
5
PWML
PWM input (low-side)
6
INTBL
Interrupt bar (low-side)
7
MOSIL
Master out slave in (low-side)
8
SCLK
Serial clock input
9
MISOL
Master in slave out (low-side)
10
EN_PS
Enable power supplies for VCC/VEE
11
FSSTATEL
Fail-safe state (low-side)
12
GND
Ground
13
FSENB
Fail-safe enable (high-side and low-side)
14
MISOH
Master in slave out
15
n.c.
No connection
16
MOSIH
Master out slave in
17
n.c.
No connection
18
CSBH
Chip select bar (high-side)
19
LED_PWR
3.3 V supply for INTB LEDs (high-side and low-side)