NXP Semiconductors PXN2020, Reference Manual, Page: 663 / 1376

FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 26-49
26.5.2.42 Timer 2 Configuration Register 0 (TI2CR0)
The content of this register depends on the value of the T2_CFG bit in the Timer Configuration and Control
Register (TICCR) . For a detailed description of timer T2, refer to Section 26.6.17.2, Absolute / Relative
Timer T2.
NOTE
If timer T2 is configured as an absolute timer and the application modifies
the values in this register while the timer is running, the change becomes
effective immediately and timer T2 will expire according to the changed
values.
If timer T2 is configured as a relative timer and the application changes the
values in this register while the timer is running, the change becomes
effective when the timer has expired according to the old values.
26.5.2.43 Timer 2 Configuration Register 1 (TI2CR1)
Base + 0x0060 Write: Anytime
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
R* T2_CYC_VAL R* T2_CYC_MSK
W
R
T2_MTCNT[31:16]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 26-42. Timer 2 Configuration Register 0 (TI2CR0)
Table 26-49. TI2CR0 Field Descriptions
Field Description
Fields for absolute timer T2 (TICCR[T2_CFG] = 0)
T2_CYC_VAL Timer T2 Cycle Filter Value — This field defines the cycle filter value for timer T2.
T2_CYC_MSK Timer T2 Cycle Filter Mask — This field defines the cycle filter mask for timer T2.
Fields for relative timer T2 (TICCR[T2_CFG = 1)
T2_MTCNT[31:16] Timer T2 Macrotick High Word — This field defines the high word of the macrotick count for timer T2.
Base + 0x0062 Write: Anytime
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
R* T2_MTOFFSET
W
R
T2_MTCNT[15:0]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 26-43. Timer 2 Configuration Register 1 (TI2CR1)