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FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
26-19
26.5.2.9
Protocol Operation Control Register (POCR)
The application uses this register to issue
•
protocol control commands
•
external clock correction commands
Protocol control commands are issued by writing to the POCCMD field. For more information on protocol
control commands, see
Section 26.7.4, Protocol Control Command Execution.
External clock correction commands are issued by writing to the EOC_AP and ERC_AP fields. For more
information on external clock correction, refer to
Section 26.6.11, External Clock Synchronization.
Table 26-14. MBSSUTR Field Descriptions
Field
Description
LAST_MB_SEG1 Last Message Buffer In Segment 1 — This field defines the message buffer number of the last individual
message buffer that is assigned to the first message buffer segment. The individual message buffers in the
first segment correspond to the message buffer control registers MBCCSRn, MBCCFRn, MBFIDRn,
MBIDXRn with n < LAST_MB_SEG1. The first message buffer segment contains LAST_ 1
individual message buffers.
Note: The first message buffer segment contains at least one individual message buffer.
The individual message buffers in the second message buffer segment correspond to the message buffer
control registers MBCCSRn, MBCCFRn, MBFIDRn, MBIDXRn with LAST_MB_SEG1 < n < 128.
Note: If LAST_MB_SEG = 127 all individual message buffers belong to the first message buffer segment
and the second message buffer segment is empty.
LAST_MB_UTIL
Last Message Buffer Utilized — This field defines the message buffer number of last utilized individual
message buffer. The message buffer search engine examines all individual message buffer with a message
buffer number n < LAST_MB_UTIL.
Note: If LAST_MB_UTIL = LAST_MB_SEG1 all individual message buffers belong to the first message
buffer segment and the second message buffer segment is empty.
Base + 0x0014
Write: Normal Mode
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
EOC_AP
ERC_AP
BSY
0
0
0
POCCMD
W WME
WMC
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-9. Protocol Operation Control Register (POCR)
Table 26-15. POCR Field Descriptions
Field
Description
WME
Write Mode External Correction — This bit controls the write mode of the EOC_AP and ERC_AP fields.
0 Write to EOC_AP and ERC_AP fields on register write.
1 No write to EOC_AP and ERC_AP fields on register write.
EOC_AP
External Offset Correction Application — This field is used to trigger the application of the external offset
correction value defined in the
Protocol Configuration Register 29 (PCR29)
.
00 do not apply external offset correction value
01 reserved
10 Subtract external offset correction value.
11 Add external offset correction value.
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...