NXP Semiconductors PXN2020, Reference Manual, Page: 207 / 1376

System Integration Unit (SIU)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 8-25
8.3.2.13.1 Pad Configuration Registers 0–15 (SIU_PCR0–SIU_PCR15)
The SIU_PCR0 to SIU_PCR15 registers control the pin function and static electrical attributes of the
Port A pins PA0 to PA15 (input only). For each pin,
Table 3-1 lists the signals available as the PA settings
for Function1, Function2, and Function3.
See Table 8-16 for bit field definitions.
8.3.2.13.2 Pad Configuration Registers 16–143 (SIU_PCR16–SIU_PCR143) and 147–154
(SIU_PCR147–SIU_PCR154)
The SIU_PCR16 to SIU_PCR143 and SIU_PCR147 to SIU_PCR154 registers control the pin function,
direction, and static electrical attributes of the Port B (PB0–PB15), Port C (PC0–PC15), Port D
(PD0–PD15), Port E (PE0–PE15), Port F (PF0–PF15), Port G (PG0–PG15), Port H (PH0–PH15), Port J
(PJ0–PJ15), and Port K (PK0–PK10) pins, except for Port K pins PK[0:2], which are shown in
SRC Slew Rate Control. Controls slew rate for the pad. Slew rate control pertains to pins with slow or medium I/O pad
types, and the output signals are driven according to the value of this field. Actual slew rate is dependent on the pad
type and load. See the PXN20 Microcontroller Data Sheet for this information.
Note: SRC is applicable to slow or medium pads only. See Table 3-1 in Section 3.4, Detailed Signal Description , for
a listing of pad types.
WPE Weak Pullup/Down Enable. Controls whether the weak pullup/down devices are enabled/disabled for the pad.
0 Weak pull device is disabled for the pad.
1 Weak pull device is enabled for the pad.
WPS Weak Pullup/Down Select. Controls whether weak pullup or weak pulldown devices are used for the pad when weak
pullup/down devices are enabled.
0 Pulldown value enabled for the pad.
1 Pullup value enabled for the pad.
Offset: SI 0x0040–SI 0x005E Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA
0
IBE
0 0 0
HYS
0 0
WPE WPS
W
Reset 0 0 0 0 0 0 0 0 0 0 0
1
0 0 0 0 0
1
A write to this bit has no effect. A read will return the written value.
Figure 8-14. Port A Pad Configuration Registers (SIU_PCR0–SIU_PCR15)
Table 8-16. SIU_PCR Field Descriptions (continued)
Field Description
SRC Slew Rate
0b00 Minimum slew rate (slowest)
0b01 Medium slew rate
0b10 Reserved
0b11 Maximum slew rate (fastest)