NXP Semiconductors PXN2020, Reference Manual, Page: 1271 / 1376

Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor A-13
0x00C4 DSPI_ASDR—DSPI DSI alternate serialization data register R/W 0x0000_0000 30.3.2.12/30-25
0x00C8 DSPI_COMPR—DSPI DSI transmit comparison register R 0x0000_0000 30.3.2.13/30-26
0x00CC DSPI_DDR—DSPI DSI deserialization data register R 0x0000_0000 30.3.2.14/30-26
0x00D0 DSPI_DSICR1—DSPI DSI TSB configuration register 1 R/W 0x0000_0000 30.3.2.15/30-27
0x00D4–0x3FFF Reserved
0xC3F9_4000
DSPI_D
Chapter 30, Deserial – Serial Peripheral Interface (DSPI)
0x0000 DSPI_MCR—DSPI module configuration register R/W 0x0000_4001 30.3.2.1/30-7
0x0004 Reserved
0x0008 DSPI_TCR—DSPI transfer count register R/W 0x0000_0000 30.3.2.2/30-9
0x000C DSPI_CTAR0—DSPI clock and transfer attributes register 0 R/W 0x7800_0000 30.3.2.3/30-10
0x0010 DSPI_CTAR1—DSPI clock and transfer attributes register 1 R/W 0x7800_0000 30.3.2.3/30-10
0x0014 DSPI_CTAR2—DSPI clock and transfer attributes register 2 R/W 0x7800_0000 30.3.2.3/30-10
0x0018 DSPI_CTAR3—DSPI clock and transfer attributes register 3 R/W 0x7800_0000 30.3.2.3/30-10
0x001C DSPI_CTAR4—DSPI clock and transfer attributes register 4 R/W 0x7800_0000 30.3.2.3/30-10
0x0020 DSPI_CTAR5—DSPI clock and transfer attributes register 5 R/W 0x7800_0000 30.3.2.3/30-10
0x0024 DSPI_CTAR6—DSPI clock and transfer attributes register 6 R/W 0x7800_0000 30.3.2.3/30-10
0x0028 DSPI_CTAR7—DSPI clock and transfer attributes register 7 R/W 0x7800_0000 30.3.2.3/30-10
0x002C DSPI_SR—DSPI status register R 0x0200_0000 30.3.2.4/30-16
0x0030 DSPI_RSER—DSPI DMA/interrupt request select and
enable register R/W 0x0000_0000 30.3.2.5/30-18
FIFO Registers
0x0034 DSPI_PUSHR—DSPI push TX FIFO register R/W 0x0000_0000 30.3.2.6/30-19
0x0038 DSPI_POPR—DSPI pop RX FIFO register R 0x0000_0000 30.3.2.7/30-21
0x003C DSPI_TXFR0—DSPI transmit FIFO register 0 R 0x0000_0000 30.3.2.8/30-21
0x0040 DSPI_TXFR1—DSPI transmit FIFO register 1 R 0x0000_0000 30.3.2.8/30-21
0x0044 DSPI_TXFR2—DSPI transmit FIFO register 2 R 0x0000_0000 30.3.2.8/30-21
0x0048 DSPI_TXFR3—DSPI transmit FIFO register 3 R 0x0000_0000 30.3.2.8/30-21
0x004C–0x0078 Reserved
0x007C DSPI_RXFR0—DSPI receive FIFO register 0 R 0x0000_0000 30.3.2.9/30-22
0x0080 DSPI_RXFR1—DSPI receive FIFO register 1 R 0x0000_0000 30.3.2.9/30-22
0x0084 DSPI_RXFR2—DSPI receive FIFO register 2 R 0x0000_0000 30.3.2.9/30-22
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register Access
1
Reset Value
2
Section/Page