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Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
36-46
Freescale Semiconductor
e200z6 Direct Branch Message Instructions (Power Architecture Book E)
shows the types of instructions that cause direct branch messages or toggle a bit in the
instruction history buffer to be messaged out in a resource full message or branch history message.
BTM Using Branch History Messages
Traditional BTM messaging can accurately track the number of sequential instructions between branches,
but cannot accurately indicate which instructions were conditionally executed, and which were not.
Branch history messaging solves this problem by providing a predicated instruction history field in each
indirect branch message. Each bit in the history represents a predicated instruction or direct branch. A
value of one (1) indicates the conditional instruction was executed or the direct branch was taken. A value
of zero (0) indicates the conditional instruction was not executed or the direct branch was not taken.
Certain instructions (
evsel
) generate a pair of predicate bits that are both reported as consecutive bits in the
history field.
Branch history messages solve predicated instruction tracking and save bandwidth since only indirect
branches cause messages to be queued.
BTM Using Traditional Program Trace Messages
Based on the PTM bit in the DC register (DC[PTM]), program tracing can utilize either branch history
messages (DC[PTM] = 1) or traditional direct/indirect branch messages (DC[PTM] = 0).
Branch history saves bandwidth and keeps consistency between methods of program trace, yet may lose
temporal order between BTM messages and other types of messages. Since direct branches are not
messaged, but are instead included in the history field of the indirect branch history message, other types
of messages may enter the FIFO between branch history messages. The development tool cannot
determine the ordering of “events” that occurred with respect to direct branches simply by the order in
which messages are sent out.
Table 36-31. Indirect Branch Message Sources
Source of Indirect Branch Message
Instructions
Taken branch relative to a register value
bcctr, bcctrl, bclr, bclrl, se_bctr,
se_bctrl, se_blr, se_blrl
System Call / Trap exceptions taken
sc, tw, twi, se_sc
Return from interrupts / exceptions
rfi, rfci, rfdi, se_rfi, se_rfci,
se_rfdi
Table 36-32. Direct Branch Message Sources
Source of Direct Branch Message
Instructions
Taken direct branch instructions
b, ba, bl, bla, bc, bca, bcl, bcla,
se_b. se_bc, se_bl, e_b, e_bc,
e_bl, e_bcl,
Instruction Synchronize
isync, se_isync
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...