NXP Semiconductors PXN2020, Reference Manual, Page: 1129 / 1376

Analog-to-Digital Converter (ADC)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 34-49
34.4.4.1 Presampling Channel Enable Signals
The presampling enable signals (presample_sw_en<3:0>) are used to enable analog switch used to sample
an internally generated voltage. It is possible to select between four internally generated voltages
V0,V1,V2,V3 depending on the value of PREVAL
n fields in the PSCR register as given in Table 34-42 .
Three Presampling Value fields (PREVAL0, PREVAL1, PREVAL2) are contained in PSCR register. The
first one is associated with group 0 channels (0 to 31), the second one with group 1 channels (from 32 to
63), and the third one with group 2 channels. That allows to select three different presampling values for
each channel type.
If the COUNTER bit of the PREREG is set, then it has a higher priority over the PREVAL field. In that
case, the first voltage (V0) is selected in the start and used for the first chain’s conversion. When the
conversion of the first chain is over, the next voltage (V1) is selected for presampling of the next chain and
so on.After V3 the next chain conversion presampling voltage wraps around to V0.
In case of a scan mode conversion if the COUNTER bit is set then for every wrap around of the conversion
chain, the value of the presampling voltage employed to precharge the ADC hard macrocell is changed as
following: For the first chain a value of V0 is used, for the second chain V1 is used, and so on. When the
presampling voltage value reaches V3, then for the next conversion chain, the value used for presampling
is V0 and the sequence repeats itself.
The presampling channel enable timings follow a different methodology in respect to the channel select
timings (for detailed explanation refer to ADC analog specifications).
34.4.5 Programmable Analog Watchdog
The analog watchdogs are used for determining whether the value obtained on conversion of a channel lies
within a given guard area (as shown in
Figure 34-50 ). If the converted value lies outside the guard area
specified by the upper and lower threshold values, then corresponding threshold violation interrupts are
generated.
As many as four analog watchdogs are available. The channel on which the analog watchdog is to be
applied is selected by the THRCH field in the TRC
n ( n = [0...3]) register. The analog watchdog is enabled
by setting the corresponding THREN bit in TRC n register ( n = [0...3]).
The lower and higher threshold values for the analog watchdog are programmed by THRL field in TRB n
( n = [0...3]) and THRH field in TRA n ( n = [0...3]) respectively.
Table 34-42. Presampling Voltage Selected Based on PREVAL Field
PREVAL0/PREVAL1/PREVAL2 Presampling Voltage Voltage Signal presample_sw_en
00 V0 V
RL
0b0001
01 V1 V
RH
ob0010
10 V2 V
DDSYN
0b0100
11 V3 V
DD
0b1000