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Enhanced Serial Communication Interface (eSCI)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
31-17
31.3.2.10 eSCI LIN Receive Register (eSCI_LRR)
This register provides the data bytes of received LIN RX frames.
Table 31-11. eSCI_LTR Field Descriptions
Field
Description
P[1:0]
Identifier Parity. This field provides the identifier parity that is used to create the protected identifier if the
automatic identifier parity generation is disabled, i.e., the PRTY bit in the eSCI LIN Control Register 1
(eSCI_LCR1) is 0.
ID[5:0]
Identifier. This field is used for the identifier field in the protected identifier.
LEN
Frame Length. This field defines the number of data bytes to be transmitted or received.
CSM
Checksum Model. This bit controls the checksum calculation model used.
0 Classic Checksum Model (LIN 1.3).
1 Enhanced Checksum Model (LIN 2.0).
CSE
Checksum Enable. This bit control the generation and checking of the checksum byte.
0 No generation and checking of checksum byte.
1 Generation and checking of checksum byte.
CRC
CRC Enable. This bit controls the generation of checking standard or enhanced LIN frames, which are described
in
Section 31.4.6.2, LIN Frame Formats.
0 Standard LIN frame generation and checking.
1 Enhanced LIN frame generation and checking.
TD
Transfer Direction. This bit control the transfer direction of the data, CRC, and checksum byte fields.
0 Data, CRC, and Checksum byte fields received, described in
Section 31.4.6.4, LIN RX Frame Generation.
1 Data, CRC, and Checksum byte fields transmitted, described in
Section 31.4.6.3, LIN TX Frame Generation.
TO
Timeout Value. The content of the field depends on the transfer direction.
RX frame: Defines the time available for a complete RX frame transfer, as described in
Slave-Not-Responding-Error Detection.
TX frame: Must be set to 0.
DATA
Transmit Data. Data bits for transmission.
Offset: ESC 0x0014
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
D
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 31-12. eSCI LIN Receive X Register (eSCI_LRR)
Table 31-12. LINRX Field Descriptions
Field
Description
D
Receive Data. This field provides the data bytes of received LIN RX frames.
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...