NXP Semiconductors PN7360AUEV, User Manual

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NXP Semiconductors
UM10858
PN7462 family HW user manual
UM10858 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC Rev. 1.4 — 14 May 2018
314514
292 of 345
Name Address
offset
Width
(bits)
Access Reset
value
Description
HOSTIF_CLR_DATA_READY
_REG 006Ch 32 W 00000000 Clear data ready flags for buffers
HOSTIF_DATA_READY_STA
TUS_REG 0070h 32 R 00000000 Status of data ready flags for buffers
HOSTIF_DBG_RX_REG 0074h 32 R 00000000 Debug Received data
HOSTIF_DBG_RX_ADDR_R
EG 0078h 32 R 00000000 Debug receive address
INTERNAL_USE 007Ch 32 R/W 00000000 For internal use
INTERNAL_USE 0080h 32 R 00000000 For internal use
INTERNAL_USE 0084h 32 R/W 000000Fh For internal use
HOSTIF_INT_CLR_ENABLE_
REG 3FD8h 32 W 00000000 Clear interrupt enable
HOSTIF_INT_SET_ENABLE
_REG 3FDCh 32 W 00000000 Set interrupt enable
HOSTIF_INT_STATUS_REG 3FE0h 32 R 00000000 Interrupt status
HOSTIF_INT_ENABLE_REG 3FE4h 32 R 00000000 Interrupt enable
HOSTIF_INT_CLR_STATUS
_REG 3FE8h 32 W 00000000 Clear interrupt
14.3.5.2 Register description
HOSTIF_STATUS_REG
This register reflects the current status of the host Interface.
Table 323. HOSTIF_STATUS_REG (address offset 0x0000)
Bit Symbol Access Value Description
31:6 RESERVED R 0 Reserved
5 TX_BUFFER_PREFET
CH_OK R 0 1 - Read prefetch of TX buffer completed.
4 TX_BUFFER_LOCK R 0 1 - TX buffer is currently in use by the
hardware.
3 RX3_BUFFER_LOCK R 0
1 - RX buffer 3 is currently in use by the
hardware.
2 RX2_BUFFER_LOCK R 0 1 - RX buffer 2 is currently in use by the
hardware.
1 RX1_BUFFER_LOCK R 0 1 - RX buffer 1 is currently in use by the
hardware.
0 RX0_BUFFER_LOCK R 0 1 - RX buffer 0 is currently in use by the
hardware.
HOSTIF_CONTROL_REG
This register is used to control the buffer manager.