NXP Semiconductors PCA9846PW-ARD, User Manual, Page: 8 / 27

NXP Semiconductors
UM11759
PCA9846PW-ARD evaluation board
power net). Refer to the SPF-46670_A.pdf schematic file of PCA9846PW-ARD
expansion board.
4.2.2 Jumpers and test points
The board contains two jumpers and several test points. Table 5 and Figure 9 show the
jumper locations and their default configurations. Table 6 shows the test points located on
the PCA9846PW-ARD board.
Ref Des Label Default Description
3-5: A0 connected to GND
1-3: A0 connected to VCC_LDOOUT1
2-4: A0 connected to SCL
J12 AD0 3-5
4-6: A0 connected to SDA
3-5: A1 connected to GND
1-3: A1 connected to VCC_LDOOUT1
2-4: A1 connected to SCL
J13 AD1 3-5
4-6: A1 connected to SDA
Table 2. PCA9846PW-ARD jumpers
Figure 3. PCA9846PW-ARD Jumper locations
Ref Des Test point / jumper label Description
TP1 SDA-CH1 I
2
C SDA line, channel 1
TP2 SCL-CH1 I
2
C SCL line, channel 1
TP3 SCL I
2
C SCL main line
TP4 SDA I
2
C SDA main line
Table 3. PCA9846PW-ARD test points
UM11759 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved.
User manual Rev. 1 — 6 June 2022
8 / 27