UM10540
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© NXP B.V. 2012. All rights reserved.
User manual
Rev. 1 — 7 March 2012
5 of 7
NXP Semiconductors
UM10540
NVT2001GM and NVT2002DP demo boards
2.2 Jumper and header functions
The functions of the jumpers and headers on these demo boards are shown in
.
3. Abbreviations
4. References
[1]
NVT2001; NVT2002, “Bidirectional voltage level translator for open-drain and
push-pull applications” —
Product data sheet; NXP Semiconductors;
www.nxp.com/documents/data_sheet/NVT2001_NVT2002.pdf
[2]
AN11127, “Bidirectional voltage level translators NVT20xx, PCA9306,
GTL2000, GTL2002, GTL2003, GTL2010” —
application note;
NXP Semiconductors;
www.nxp.com/documents/application_note/AN11127.pdf
Table 1.
Header descriptions for NVT2001GM (OM13315) and NVT2002DP (OM13318) demo boards
Jumper/header
Function
Notes
J1 (3-pin)
Device switch enable or disable
control
Short pins 2 and 3 to enable the NVT2001GM or NVT2002DP
device (default). When pins 1 and 2 are shorted, the device is
disabled.
J2 (2-pin)
Connects 10 k
Ω
pull-up resistors to
VREFA on low voltage side for
VREFB
−
VREFA < 1 V
Short pins 1 and 2 to connect 10 k
Ω
pull-up resistors to VREFA
on low voltage side (default).
Remark:
Pins 1 and 2 must be open and 10 k
Ω
pull-up resistors
must be removed when VREFB
−
VREFA
≥
1 V.
J3 (4-pin)
Low voltage VREFA, GND and
An I/O signal connect pins
Pin 1 = VREFA: low voltage power.
Pin 4 = GND: low voltage ground.
A1 is low voltage signal for NVT2001GM.
A[1:2] are low voltage signals for NVT2002DP.
J4 (4-pin)
High voltage VREFB, GND and
Bn I/O signal connect pins
Pin 1 = VREFB: high voltage power.
Pin 4 = GND: high voltage ground.
B1 is high voltage signal for NVT2001GM.
B[1:2] are high voltage signals for NVT2002DP.
Table 2.
Abbreviations
Acronym
Description
I
2
C-bus
Inter-Integrated Circuit bus
I/O
Input/Output
SMBus
System Management Bus
SPI
Serial Peripheral Interface
