NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 882 / 1761

Table 33-11. Memory Mapped Individual Flash Mode - Flash B Address Scheme
(continued)
Memory Mapped Address 32 Bit
Access
Memory Mapped Address 64 Bit
Access
Serial Flash Byte Address
Flash
Device
TOP_ADDR_MEMB1 - 0x04 (TOP_ADDR_MEMB1-
TOP_ADDR_MEMA2 - 0x04) to
(TOP_ADDR_MEMB1-
TOP_ADDR_MEMA2- 0x01)
TOP_ADDR 0x00 TOP_ADDR 0x00_0000 0x00_0000 to 0x00_0003 B2
TOP_ADDR 0x04 0x00_0004 to 0x00_0007
….. … …
TOP_ADDR_MEMB2 - 0x08 TOP_ADDR_MEMA2 - 0x08 (TOP_ADDR_MEMB2 -
TOP_ADDR_MEMB1- 0x08) to
(TOP_ADDR_MEMB2 -
TOP_ADDR_MEMB1 - 0x04 - 0x01)
TOP_ADDR_MEMB2 - 0x04 (TOP_ADDR_MEMB2-
TOP_ADDR_MEMB1 - 0x04) to
(TOP_ADDR_MEMB2 -
TOP_ADDR_MEMB1 - 0x01)
The available address range depends from the size of the external serial flash device. Any
access beyond the size of the external serial flash provides undefined results.
For details concerning the read process refer to Flash Read .
33.5.4 AHB RX Data Buffer (QSPI_ARDB0 to QSPI_ARDB31)
NOTE
See the System Memory map in this document for the base
address of the QSPI AHB RX Data Buffer.
memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
0 AHB RX Data Buffer register (ARDB0) 32 R/W 0000_0000h 33.5.4.1/882
4 AHB RX Data Buffer register (ARDB1) 32 R/W 0000_0000h 33.5.4.1/882
8 AHB RX Data Buffer register (ARDB2) 32 R/W 0000_0000h 33.5.4.1/882
C AHB RX Data Buffer register (ARDB3) 32 R/W 0000_0000h 33.5.4.1/882
10 AHB RX Data Buffer register (ARDB4) 32 R/W 0000_0000h 33.5.4.1/882
14 AHB RX Data Buffer register (ARDB5) 32 R/W 0000_0000h 33.5.4.1/882
18 AHB RX Data Buffer register (ARDB6) 32 R/W 0000_0000h 33.5.4.1/882
Table continues on the next page...
Flash memory mapped AMBA bus
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
882 NXP Semiconductors