• Integrated clocking architecture with on-chip fast IRC 48-60 MHz, slow IRC 8
MHz / 2 MHz, 128 KHz LPO and a PLL unit.
• Analog modules providing precision mixed-signal capabilities, including 12-bit up to
two 1 Msps SAR ADC, high-speed comparator.
• Power Management Controller (PMC) with internal regulators capable of supporting
multiple power modes including:
• HSRUN
• RUN
• STOP
• VLPR
• VLPS
• I/O supporting 2.7 V to 5.5 V supply
• Wide operating voltage ranges (2.7–5.5 V) with fully functional flash memory
program/erase/read operations
• 64 LQFP ,100 LQFP and 100 BGA packages with up to 156 GPIO pins
• Ambient operating temperature ranges from –40 °C to 125 °C
The MWCT101xS MCU portfolio is supported by a highly comprehensive set of
development tools and software. The enablement package includes: NXP Arduino
compatible evaluation boards, WCT Software Development Kit (SDK) including
graphical configurability and WCT Design Studio software, as well as broad support
from IAR Systems, Keil MDK, and other partners.
2.3 Feature summary
The following table lists the features integrated on WCT101xS product series.
Table 2-1. Device feature summary
Feature
Summary for WCT101xS product series
Hardware Characteristics
Package
64-pin LQFP, 10*10 mm, 0.5 mm pitch
100-pin LQFP, 14*14 mm, 0.5 mm pitch
100-pin BGA, 11*11 mm, 1.0 mm pitch
Voltage range
2.7 V to 5.5 V
Temperature range (T
A
)
-40 °C to 125 °C
Temperature range (T
J
)
-40 °C to 135 °C
System
Table continues on the next page...
2. This refers to region addressable by Arm CM4 Code bus and is used to cache code as well as data in this region.
See WCT101x_memory_map.xlsx for more details on cacheability of different regions.
3. HSRUN mode (112 MHz) operation is not valid at 125 °C
Feature summary
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
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NXP Semiconductors
Summary of Contents for MWCT101 S Series
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Page 50: ...Conventions MWCT101xS Series Reference Manual Rev 3 07 2019 50 NXP Semiconductors...
Page 70: ...Aliased bit band regions MWCT101xS Series Reference Manual Rev 3 07 2019 70 NXP Semiconductors...
Page 78: ...Pinout diagrams MWCT101xS Series Reference Manual Rev 3 07 2019 78 NXP Semiconductors...
Page 96: ...WCT101xS safety concept MWCT101xS Series Reference Manual Rev 3 07 2019 96 NXP Semiconductors...
Page 130: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 130 NXP Semiconductors...
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Page 472: ...Application Information MWCT101xS Series Reference Manual Rev 3 07 2019 472 NXP Semiconductors...
Page 528: ...Module clocks MWCT101xS Series Reference Manual Rev 3 07 2019 528 NXP Semiconductors...
Page 634: ...SRAM configuration MWCT101xS Series Reference Manual Rev 3 07 2019 634 NXP Semiconductors...
Page 818: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 818 NXP Semiconductors...
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Page 992: ...ADC calibration scheme MWCT101xS Series Reference Manual Rev 3 07 2019 992 NXP Semiconductors...
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Page 1726: ...Debug and security MWCT101xS Series Reference Manual Rev 3 07 2019 1726 NXP Semiconductors...
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