NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 1196 / 1761

41.5.3.5 Counter events
Counter events can be used as reload opportunities to FTM register sychronization
mechanism. See
Reload Points for more details. There are some possible counter events
depending on the counter mode. Please see the table below for more details.
Table 41-4. FTM counter events
When Then
FTM counter is in up counting mode or freerunning • A counter event happens at the same time of TOF bit
set when the FTM counter changes from MOD to
CNTIN (counter wrap). Figure at
Up counting shows the
counter event generation.
• When in freerunning, there is a counter event when
FTM counter changes from 0xFFFF to 0x0000. Figure
at
Free running counter shows the counter event
generation.
FTM counter is in up-down counting mode • In up-down counting mode, there are two possible
counter events when FTM counter turns from down to
up counting and when counter turns from up to down
counting. User can select which point will be used to
generate the counter event. Figure at
Up-down counting
shows the possible counter events.
FTM counter is reseted (see Counter reset ) or a value
different from zero is written at CLKS field
• In up-counting mode, all counter reset events or a write
in the CLKS with a value different from zero generates
a counter event.
• In up-down counting mode, counter reset events only
generates a counter event if the minimum load point
when FTM counter turns from down to up counting is
configured. A write in the CLKS with a value different
from zero always generates a counter event in up-down
counting mode.
41.5.4 Channel Modes
The following table shows the channel modes selection.
Table 41-5. Channel Modes Selection
DECAPEN MCOMBINE COMBINE CPWMS MSB:MSA ELSB:ELSA Mode Configuratio
n
X X X X XX 00 Pin not used for FTM—revert
the channel pin to general
purpose I/O or other
peripheral control
0 0 0 0 00 01 Input Capture Capture on
Rising Edge
Only
Table continues on the next page...
Functional Description
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1196 NXP Semiconductors