NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 1193 / 1761

FTM counter
...
...
FTM counting is up
TOF bit
0x0005 0x0015 0x0016 0xFFFE 0xFFFF 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0015 0x0016
MOD = 0x0005
CNTIN = 0x0015
set TOF bit
set TOF bit
load of CNTIN
load of CNTIN
...
counter event
counter event
Figure 41-10. Example of up counting when the value of CNTIN is greater than the value
of MOD
41.5.3.2 Up-down counting
Up-down counting is selected when:
• QUADEN = 0, and
• CPWMS = 1
CNTIN defines the starting value of the count and MOD defines the final value of the
count. The value of CNTIN is loaded into the FTM counter, and the counter increments
until the value of MOD is reached, at which point the counter is decremented until it
returns to the value of CNTIN and the up-down counting restarts.
The FTM period when using up-down counting is 2 × (MOD – CNTIN) × period of the
FTM counter clock.
The TOF bit is set when the FTM counter changes from MOD to (MOD – 1).
If (CNTIN = 0x0000), the FTM counting is equivalent to TPM up-down counting, that is,
up-down and unsigned counting. See the following figure.
Chapter 41 FlexTimer Module (FTM)
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
NXP Semiconductors 1193