Board Interface Connector
MPC5777C EVB User Guide, Rev. 1
24
NXP Semiconductors
Card has the option to connect with an on-board clock oscillator circuit. For MII-Lite mode, the
clock from the Ethernet Physical (PHY) interface on the Mother Board is available.
The FEC Clock Oscillator Circuit & Jumpers in the Daughter card is shown in the
Figure 18:
FEC Clock Circuit
Jumper settings for the FEC section are detailed in the
Table 15: FEC Interface Jumper Details
Jumper
Description
Jumper Setting
– MII-Lite
Mode
Jumper Setting
– RMII
Mode
J25
FEC_TXD2 Selection
2-3: Connect with PM4
(TXD2) from Mother Board
1-2: Connect with PM3
(RXER_MDIXEN) from MB.
J510
FEC Clock Selection
1-2: Connect with Mother
Board
2-3: Connect with On Board
50MHz Oscillator
J524
On Board FEC 50MHz
CLK Enable
1-2: Clock Oscillator in Tri-
state
2-3: Clock Oscillator in
Normal Operation
4.8
Zipwire Interface
The MCU features a bus for communicating between two devices over a high speed (240 MHz) serial
interface called Zipwire. It is implemented using a Serial Inter-Processor Interface (SIPI) over an LVDS
Fast synchronous Serial Transmission Interface (LFAST). The SIPI module controls the higher level
protocol of the interface, and the LFAST controls the physical interface.
This interface consists of five signals:
•
a pair of LVDS transmits pins,
•
a pair of receive LVDS pins and
•
a clock. The clock is unidirectional and is defined to be an output on the Slave and an input on the
Master node.
The daughter card SIPI connector (J13) interface signal diagram is shown in
