NXP Semiconductors MPC5644A, Reference Manual, Page: 895 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 895
24.5.7.2.1 TPR – Tooth program register
TPR provides configuration for the Angle Counter circuit. In this register, the microcode can properly
adjust the tooth count (controlling last tooth, missing teeth, dummy tooth insertion, halt until tooth
detection) and the number of angle ticks per tooth (field TICKS). Note that this register is sampled into a
temporary register in the EAC logic when the High Rate Mode is detected (see
Section 24.5.7.5.3, High
rate mode (Acceleration) , and Section 24.5.7.12.1, TPR buffering ), which means that changes to this
register may take effect only for the next tooth.
Refer to Section 24.5.7.5, Count control and high rate logic , and to Section 24.5.7.6, Special cases of
missing teeth and last tooth , until Section 24.5.7.9, Handling false tooth detection , for a detailed
explanation about the use of this register. Figure 24-52 provides a detailed description of the TPR.
Several conflict issues on TPR writes are explained in Section 24.5.7.12, Special TPR write cases .
Figure 24-52. TPR Register
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R LAST MISS
CNT
IPH HOL
D
TPR
10
TICK
S
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Field Description
[9:0]
TICKS
Angle Ticks Number in the Current Tooth
This field defines the number of angle ticks in the current physical tooth. It partitions the tooth period to the
required number of angle ticks. The actual number of angle ticks in a tooth is (TICKS+1).
In High Rate mode (see Section 24.5.7.5.3, High rate mode (Acceleration) ), TPR writes are immediately
effective only for bits IPH and HOLD. All other fields changes are “buffered” and become effective when
EAC leaves High Rate mode. See also
Section 24.5.7.12, Special TPR write cases .
Bits LAST, IPH and HOLD must not be asserted all at once.
10
TPR
TPR register
Reserved bit. In Angle Mode, must always be written 0 by the user, but holds the value written, so that TPR
can be used as a general purpose register bit when angle mode is off.
11
HOLD
Force EAC Hold
This bit forces the EAC to halt its operation in a special EAC freeze mode until a new physical tooth (a real
one or emulated with IPH = 1) is detected. Assertion of this bit immediately freezes the EAC in the middle
of the tooth period. When a new physical tooth is detected, the bit is automatically negated by the EAC.
The HOLD bit can be used for synchronizing the EAC tooth count, in case that a false physical tooth is
detected due to noise.
Normal Operation.
Force EAC to halt until detection of a physical tooth.