NXP Semiconductors MPC5644A, Reference Manual, Page: 705 / 1735

Reaction Module (REACM)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 705
23.3.8 REACM Channel n Status Register (REACM_CHSRn)
The REACM Channel n Status Register (REACM_CHSRn) provides access to the channel flags and flag
clear bits. It also provides access to the current values of the channel output being driven and the
Modulation Word being accessed by the channel.
13–15
DOFF[2:0]
Drive Off Control field
The DOFF[2:0] field defines the reaction channel output disabled state. This condition is
achieved either when CHEN = 00, or after CHEN activation, or when Output is disabled
by CHOFF in the Channel Configuration register.
Note: It is possible to control the channel outputs directly through the software by writing
to the DOFF bits. Refer to
Table 23-10 . In this case the channel should be in the
disabled state, CHEN = 00. If the DOFF value is changed just after the channel is
enabled, it is not assured the new DOFF value is immediately used in the channel
output.
16–20 Reserved, should be cleared.
21–23
BSB[2:0]
Bank Support Bits
The BSB[2:0] provides control for a banked mode operation of the Reaction Module.
Each bit in this field controls the channel outputs ch
n _c, ch n _b and ch n _a respectively.
When asserted the channel output implements an OR with the corresponding output of
the subsequent channel.
24–25 Reserved, should be cleared.
26–31
MODULATION_ADDR
[5:0]
Address for Modulation Control Bank
The MODULATION_ADDR[5:0] field has the address of the Modulation Word in the
Modulation Control Bank. This address is used as a base address for the first modulation
word. The reaction channel can access subsequent words in the Modulation Control
Bank by incrementing the Modulation Address field. Note that this field is not modified by
the reaction channel in this process.
Table 23-10. Output assignment through DOFF
DOFF Channel output Comments
DOFF[0] CHn_a DOFF[0] bit defines CHn_a output pin value
DOFF[1] CHn_b DOFF[1] bit defines CHn_b output pin value
DOFF[2] CHn_c DOFF[2] bit defines CHn_c output pin value
Table 23-9. REACM_CHCRn field descriptions (continued)
Field Description