NXP Semiconductors MPC5644A, Reference Manual, Page: 692 / 1735

Reaction Module (REACM)
MPC5644A Microcontroller Reference Manual, Rev. 6
692 Freescale Semiconductor
Each reaction channel has three independently programmable outputs. The outputs do not have a
predefined ON or OFF state meaning that the definition of ON and OFF depends upon the application.
Figure 23-2 illustrates the interconnection between a reaction channel and the blocks in the reaction
module. The indexes next to the blocks indicate the order in which each submodule executes an action
during the modulation process. A simplified sequence of these steps is described as follows:
1. A new ADC result from the eQADC module is received, triggering one reaction channel.
2. The triggered reaction channel generates the Modulation Word address based on the data
programmed in the internal configuration register.
3. A Modulation word is selected by the reaction channel.
4. The selected Modulation Word generates the address for the Threshold Bank.
5. The Threshold bank selected data is compared against the incoming ADC result.
6. The comparison result is sent back to the channel.
7. The reaction channel executes modulation action and updates the channel output.
In order to execute steps 1 through 7 the reaction module takes five module clock cycles.
The reaction channel sets the outputs according to fields HOD or LOD provided by the selected
modulation word.
Figure 23-2. Channel interaction with internal submodules
Modulation
Control Bank
Bank
Timer
Timer
Bank
CHn
Comparator
Timer
Channels
eQADC
side port
Timer
Bank
Holdoff
rchn_a
rchn_b
rchn_c
[15:0]
greater or equal
Threshold
1
ADC result
ADC TAG
reaction
channel
Shared Timer Bank
2
3
4
5
6
7