NXP Semiconductors MPC5644A, Reference Manual, Page: 685 / 1735

Configurable Enhanced Modular IO Subsystem (eMIOS200)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 685
Figure 22-41 provides a block diagram for the STAC client submodule.
Figure 22-41. STAC client submodule block diagram
EMIOS_MCR[SRV] bits select the time slot of the STAC output bus. Figure 22-42 shows a timing
diagram for the STAC client submodule.
Figure 22-42. Timing diagram for STAC bus and STAC client submodule output
Every time the selected time slot changes, the STAC client submodule output is updated.
22.5.3.1 Effect of freeze on the STAC client submodule
When bit EMIOS_MCR[FRZ] is set and the module is in debug mode, the operation of the STAC client
submodule is not affected; that is, there is no freeze function in this submodule.
Table 22-11. STAC client submodule server slot assignment
Time base Server ID
TCR1 0
TCR2 2
SRV3 SRV2 SRV1 SRV0
STAC bus Time base
STAC client submodule
(24-bit wide) output
Time slot selector bits
TS[02]
STAC bus
(submodule input)
TS[00] TS[01] TS[02]
Time base
(submodule output)
TS[01] xx
The SRV bits are set to capture TS[01].
TS[03] TS[00] TS[03] TS[00] TS[01]
System clock
TS[01]
STAC bus (REDC input)
TS[00] TS[01] TS[02]
1. Maximum of 16 time slots (TS n )
NOTES:
TS[01] TS[00]
TSn1 TS[02]
Time base (REDC output)
TS[01] TS[01] xx
2. The SRV bits capture TS[01]