NXP Semiconductors MPC5644A, Reference Manual, Page: 588 / 1735

Error Correction Status Module (ECSM)
MPC5644A Microcontroller Reference Manual, Rev. 6
588 Freescale Semiconductor
• RAM ECC Data Register (ECSM_REDR)
The details on the ECC registers are provided in the subsequent sections.
The 32-bit ECC organization essentially provides two completely independent error checking mechanisms
for the total 64-bit RAM width. The ECC logic provides a 1-of-3 error response vector for each 32 bits of
memory: no error, single-bit correctable error, multi-bit non-correctable error.
Table 18-5 defines the
association between the reported ECC result and the RAM bank chip selects.
As shown in Table 18-5 , accesses of only a single memory bank report the ECC from that bank directly.
For accesses involving both banks, the “most severe” ECC response is reported with the even bank taking
priority if the responses are equivalent. This approach also provides improved correction capabilities
compared to the 64-bit ECC implementation.
18.4.4.1 ECC Configuration Register (ECSM_ECR)
The ECC Configuration Register is an 8-bit control register for specifying which types of memory errors
are reported. In all systems with ECC, the occurrence of a non-correctable error causes the current access
to be terminated with an error condition. In many cases, this error termination is reported directly by the
initiating bus master. However, there are certain situations where the occurrence of this type of
Table 18-5. AHB Response and ECC Reporting for Even and Odd ECC
RAM Valid
Even
RAM
Valid
Odd
ECC Even ECC Odd
Reported
ECC
RAM Bus
Response
Even
RAM Bus
Response Odd
AHB HRESP
0 0 x x No access,
No_error
xxxx xxxx okay
1 0 none x No_error data xxxx okay
1 0 single x Even_single corrected xxxx okay
1 0 multi x Even_multi non-corrected xxxx err
0 1 x none No_error xxxx data okay
0 1 x single Odd_single xxxx corrected okay
0 1 x multi Odd_multi xxxx non-corrected err
1 1 none none No_error data data okay
1 1 single none Even_single corrected data okay
1 1 multi none Even_multi non-corrected data err
1 1 none single Odd_single data corrected okay
1 1 single single Even_single corrected corrected okay
1 1 multi single Even_multi non-corrected corrected err
1 1 none multi Odd_multi data non-corrected err
1 1 single multi Odd_multi corrected non-corrected err
1 1 multi multi Even_multi non-corrected non-corrected err