NXP Semiconductors MPC5644A, Reference Manual, Page: 524 / 1735

System Integration Unit (SIU)
MPC5644A Microcontroller Reference Manual, Rev. 6
524 Freescale Semiconductor
Figure 16-202 illustrates the available trigger selections for eQADC CFIFO5.
Figure 16-202. Trigger selection for eQADC CFIFO queue 5
As shown in the above figure, the TSEL5 field can be used to select the eTPU_A[26], eMIOS[12] or
GPIO[207] signal or, by assigning a value of 0b00 to the TSEL5 field, a variety of other signals can be
selected using the eTSEL5 field of the SIU_ISEL3 register.
Figure 16-203. eQADC Trigger Input Select Register (SIU_ETISR)
S0x900
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
TSEL5 TSEL4 TSEL3 TSEL2 TSEL1 TSEL0 0 0 0 0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
= Unimplemented or Reserved
SIU_ETISR[TSEL5]
00 01 10 11
eT
PU
_A
[2
6]
eM
IO
S[
12
]
ET
RI
G[
1]
SIU_ISEL3[eTSEL5]
PI
T1
T
rig
ge
r
PI
T3
T
rig
ge
r
eT
PU
[3
0]
A
ND
P
IT
1
to eQADC external trigger input 5
PI
T2
T
rig
ge
r
eT
PU
30
A
ND
P
IT
0
eT
PU
[2
9]
ET
RI
G2
p
in
eT
PU
[2
8]
eT
PU
[3
1]
RT
I T
rig
ge
r
PI
T0
T
rig
ge
r
GP
IO
[2
07
]
eM
IO
S[
10
] A
ND
P
IT
3
eM
IO
S[
23
]
eT
PU
[3
0]
eM
IO
S[
10
] A
ND
P
IT
2