NXP Semiconductors MPC5644A, Reference Manual, Page: 1632 / 1735

Periodic Interrupt Timer (PIT)
MPC5644A Microcontroller Reference Manual, Rev. 6
1632 Freescale Semiconductor
The counter period of a running timer can be modified, by first disabling the timer, setting a new load value
and then enabling the timer again (see
Figure 34-8 ).
It is also possible to change the counter period without restarting the timer by writing the LDVAL register
with the new load value. This value will then be loaded after the next trigger event (see
Figure 34-9 ).
Figure 34-7. Stopping and starting a timer
Figure 34-8. Modifying running timer period
Figure 34-9. Dynamically setting a new load value
34.5.1.2 Debug mode
In Debug mode the timers will be frozen—this is intended to aid software development, allowing the
developer to halt the processor, investigate the current state of the system (e.g. the timer values) and then
continue the operation.
34.5.2 Interrupts
All of the timers support interrupt generation. The RTI is typically used for system wakeup, but can be
used for interrupt generation as well. Refer to the section “Functional description” in
Chapter 15, Interrupt
Controller (INTC) for related vector addresses and priorities.
Timer interrupts can be disabled by setting the TIE bits to zero. The timer interrupt flags (TIF) are set to 1
when a timeout occurs on the associated timer, and are cleared to 0 by writing a 1 to that TIF bit.
p1 p1
Timer Enabled Disable
Timer
p1
Start Value = p1
Trigger
Event
p1
Re-Enable
Timer
p1
Timer Enabled
Disable
Timer,
Start Value = p1
Trigger
Event
Re-Enable
Timer
p1
Set new
Load Value
p2 p2 p2
p1 p1
Timer Enabled New Start
Value p2 set
p1 p2
Start Value = p1
p2
Trigger
Event