NXP Semiconductors MPC5644A, Reference Manual, Page: 1622 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
1622 Freescale Semiconductor
The availability of data in the transmit buffer is indicated by the commit bit FR_MBCCSRt[CMT] and the
lock bit FR_MBCCSRt[LCKS].
The receive message buffer has the message buffer number r and is configured as shown in Table 33-139 .
Furthermore the assumption is that both message buffers are enabled (FR_MBCCSR t [EDS] = 1 and
FR_MBCCSR r [EDS] = 1).
NOTE
The cycle set {4n+2} = {2,6,10,...} is assigned to the receive buffer only.
The cycle set {4n} = {0,4,8,12,...} is assigned to both buffers.
33.7.8.2 Behavior in static segment
In this case, both message buffers are assigned to a slot S in the static segment.
The configuration of a transmit buffer for a static slot S assigns this slot to the node as a transmit slot. The
FlexRay protocol requires:
• When a slot occurs, if the slot is assigned to a node on a channel that node must transmit either a
normal frame or a null frame on that channel. Specifically, a null frame will be sent if there is no
data ready, or if there is no match on a transmit filter (cycle counter filtering, for example).
Regardless of the availability of data and the cycle counter filter, the node will transmit a frame in the static
slot
S. In any case, the result of the message buffer search will be the transmit message buffer t. The receive
message buffer r will not be found, no reception is possible.
33.7.8.3 Behavior in dynamic segment
In this case, both message buffers are assigned to a slot S in the dynamic segment. The FlexRay protocol
requires:
Table 33-139. Receive buffer configuration
Register Field Value Description
FR_MBCCSR r MCM — n/a
MBT — n/a
MTD 0 receive buffer
FR_MBCCFR r MTM — n/a
CHA 1 assigned to channel A
CHB 0 not assigned to channel B
CCFE 1 cycle counter filter enabled
CCFMSK 000001 cycle set = {2n} = {0,2,4,6,...}
CCFVAL 000000
FR_MBFIDR r FID S subscribed slot