NXP Semiconductors MPC5644A, Reference Manual, Page: 1618 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
1618 Freescale Semiconductor
Filter Registers (FR_MBCCFRn) , Message Buffer Frame ID Registers (FR_MBFIDRn) ,
Message Buffer Index Registers (FR_MBIDXRn)
d) configure the FIFOs
e) issue CONFIG_COMPLETE command via Protocol Operation Control Register (FR_POCR)
f) wait for POC:ready in Protocol Status Register 0 (FR_PSR0)
After this sequence, the CC is configured as a FlexRay node and is ready to integrate into the FlexRay
cluster.
33.7.2.3 CHI LRAM initialization
The module will start reading CHI LRAM data if it has entered the start up state, thus, all ECC bits have
to set correctly. To fulfill this requirement, the application must write initial values into all message buffer
configuration registers FR_MBCCFRn, FR_MBFIDRn, and FR_MBIDXRn during the protocol config
state, even if the message buffers are not used.
33.7.2.4 PE DRAM initialization
The PE DRAM initialization is performed by the module in the POC:default config state. This
initialization runs for 4.8 µs, and will delay the state transition from POC:default config into POC:config .
33.7.3 CHI LRAM error injection out of POC:default config
When the FlexRay module is out of the POC:default config state, it reads the configuration data of all
utilized message buffers in every slot. If the module reads the CHI LRAM address that was used for error
injection, an memory error is detected and the message buffer is not used for transmission or reception.
This section describes how to inject errors on the CHI LRAM without disturbing the running application.
• Set injection address to FR_EEIDR[ADDR] = 0x1F
— only the last two message buffers are affected by error injection
• Utilize less than 63 message buffers; FR_MBSSUTR[LAST_MB_UTIL]

62
— the last two message buffers are not used and configuration data are not read by the module
33.7.4 PE DRAM error injection out of POC:default config
When the FlexRay module is out of the POC:default config state, only the PE DRAM address 0x70 is
writable by the application. This location is not used by the FlexRay module.
33.7.5 Shut down sequence
This section describes a secure shut down sequence to stop the CC. The main targets of this sequence are
• Finish all ongoing reception and transmission
• Do not corrupt FlexRay bus and do not disturb ongoing FlexRay bus communication