NXP Semiconductors MPC5644A, Reference Manual, Page: 1601 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1601
• (FR_SSCCRn[VFR] | FR_SSCCRn[SYF] | FR_SSCCRn[NUF] | FR_SSCCRn[SUF]) // count on
frame condition
= 1;
and
• ((~FR_SSCCRn[VFR] | vSS!ValidFrame ) & // valid frame restriction
(~FR_SSCCRn[SYF] | vRF!Header!SyFIndicator ) & // sync frame indicator restriction
(~FR_SSCCRn[NUF] | ~ vRF!Header!NFIndicator ) & // null frame indicator restriction
(~FR_SSCCRn[SUF] | vRF!Header!SuFIndicator )) // startup frame indicator restriction
= 1;
NOTE
The indicator bits SYF, NUF, and SUF are valid only when a valid frame
was received. Thus it is required to set the VFR always, whenever count on
frame condition is used.
2. slot related condition:
• ((FR_SSCCRn[STATUSMASK[3]] & vSS!ContentError ) | // increment on content error
(FR_SSCCRn[STATUSMASK[2]] & vSS!SyntaxError ) | // increment on syntax error
(FR_SSCCRn[STATUSMASK[1]] & vSS!BViolation ) | // increment on boundary violation
(FR_SSCCRn[STATUSMASK[0]] & vSS!TxConflict )) // increment on transmission conflict
= 1;
If the slot status counter is in single cycle mode, that is, FR_SSCCRn[MCY] = 0, the internal slot status
counter FR_SSCRn_INT is reset at each cycle start. If the slot status counter is in the multicycle mode,
that is, FR_SSCCRn[MCY] = 1, the counter is not reset and incremented, until the maximum value is
reached.
33.6.18.5 Message buffer slot status field
Each individual message buffer and each FIFO message buffer provides a slot status field, which provides
the information shown in
Table 33-126 for the static/dynamic slot. The update conditions for the slot status
field depend on the message buffer type. Refer to the Message Buffer Update Sections in Section 33.6.6,
Individual message buffer functional description ”.
33.6.19 System bus access
This section provides a description of the system bus accesses failures and the related CC behavior. System
bus access failures may occur when the CC transfers data to or from the flexray memory area.
The system bus access failure types are described in Section 33.6.19.1, System bus access failure types ”.
The behavior of the CC after the occurrence of a system bus access failure is described in
Section 33.6.19.2, System bus access failure response ”.
33.6.19.1 System bus access failure types
This section describes the two types of system bus access failures.