NXP Semiconductors MPC5644A, Reference Manual, Page: 1524 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
1524 Freescale Semiconductor
33.5.2.72 ECC Error Report Address Register (FR_EERAR)
This register provides the memory identifier, bank, and address for which the memory error is reported.
EIM Error Injection Mode — This bit configures the ECC error injection mode.
0 use FR_EEIDR[DATA] and FR_EEICR[CODE] as XOR distortion pattern for error injection.
1 use FR_EEIDR[DATA] and FR_EEICR[CODE] as write value for error injection.
EIE Error Injection Enable — This bit configures the ECC error injection on the memories.
0 Error injection disabled
1 Error injection enabled
Note: When the ECC functionality is required to be disabled (i.e.value of the FR_MCR[ECCE] is 0),
Error Injection Enable bit FR_EERICR[EIE] should not be set to 1.
Base + 0x00F4
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R MID BANK ADDR
W
Reset 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-103. ECC Error Report Address Register (FR_EERAR)
Table 33-82. FR_EERAR field description
Field Description
MID Memory Identifier — This flag provides the memory instance for which the memory error is reported.
0 PE DRAM
1 CHI LRAM
BANK Memory Bank — This field provides the BANK for which the memory error is reported.
111 reset value, indicates no error found after reset.
For MID = 0:
000 BANK0: PE DRAM [7:0]
001 BANK1: PE DRAM [15:8]
Others – not used
For MID = 1:
000 BANK0: FR_MBCCFR(2n)
001 BANK1: FR_MBFIDR(2n)
010 BANK2: FR_MBIDXR(2n)
011 BANK3: FR_MBCCFR(2n+1)
100 BANK4: FR_MBFIDR(2n+1)
101 BANK5: FR_MBIDXR(2n+1)
Others – not used
ADDR Memory Address — This field provides the address of the failing memory location.
Table 33-81. FR_EERICR field description
Field Description