NXP Semiconductors MPC5644A, Reference Manual, Page: 1492 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
1492 Freescale Semiconductor
33.5.2.37 Sync Frame ID Acceptance Filter Value Register (FR_SFIDAFVR)
This register defines the sync frame acceptance filter value. For details on filtering, see Section 33.6.15,
Sync frame filtering ”.
33.5.2.38 Sync Frame ID Acceptance Filter Mask Register (FR_SFIDAFMR)
This register defines the sync frame acceptance filter mask. For details on filtering see Section 33.6.15.1,
Sync frame acceptance filtering” .
33.5.2.39 Network Management Vector Registers (FR_NMVR0–FR_NMVR5)
Base + 0x0048 Write: POC:config
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0
FVAL
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-37. Sync Frame ID Acceptance Filter Value Register (FR_SFIDAFVR)
Table 33-42. FR_SFIDAFVR field description
Field Description
FVAL Filter Value — This field defines the value for the sync frame acceptance filtering.
Base + 0x004A Write: POC:config
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0
FMSK
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-38. Sync Frame ID Acceptance Filter Mask Register (FR_SFIDAFMR)
Table 33-43. FR_SFIDAFMR field description
Field Description
FMSK Filter Mask — This field defines the mask for the sync frame acceptance filtering.
Base + 0x004C (FR_NMVR0)
Base + 0x004E (FR_NMVR1)
Base + 0x0050 (FR_NMVR2)
Base + 0x0052 (FR_NMVR3)
Base + 0x0054 (FR_NMVR4)
Base + 0x0056 (FR_NMVR5)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R NMVP[15:8] NMVP[7:0]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-39. Network Management Vector Registers (FR_NMVR0–FR_NMVR5)