NXP Semiconductors MPC5644A, Reference Manual, Page: 1423 / 1735

FlexCAN Module
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1423
buffers with PRIO = 000 have higher priority. If two or more message buffers have the same priority, the
regular ID will determine the priority of transmission. If two or more message buffers have the same
priority (three extra bits) and the same regular ID, the lowest message buffer will be transmitted first.
Once the highest priority message buffer is selected, it is transferred to a temporary storage space called
Serial Message Buffer (SMB), which has the same structure as a normal message buffer but is not user
accessible. This operation is called “move-out” and after it is done, write access to the corresponding
message buffer is blocked (if MCR[AEN] is asserted). The write access is released in the following events:
• After the message buffer is transmitted
• FlexCAN enters in HALT or BUS OFF
• FlexCAN loses the bus arbitration or there is an error during the transmission
At the first opportunity window on the CAN bus, the message on the SMB is transmitted according to the
CAN protocol rules. FlexCAN transmits up to eight data bytes, even if the DLC (Data Length Code) value
is bigger.
32.5.4 Receive process
To be able to receive CAN frames into the mailbox message buffers, the CPU must prepare one or more
Message Buffers for reception by executing the following steps:
1. If the message buffer has a pending transmission, write an ABORT code (‘1001’) to the Code field
of the Control and Status word to request an abortion of the transmission, then read back the Code
field and the IFRL or IFRH register to check if the transmission was aborted (see
Section 32.5.6.1,
Transmission abort mechanism ). If backwards compatibility is desired (AEN in MCR negated),
just write ‘1000’ to the Code field to inactivate the message buffer, but then the pending frame may
be transmitted without notification (see
Section 32.5.6.2, Message buffer deactivation ). If the
message buffer already programmed as a receiver, just write ‘0000’ to the Code field of the Control
and Status word to keep the message buffer inactive.
2. Write the ID word
3. Write ‘0100’ to the Code field of the Control and Status word to activate the message buffer
Once the message buffer is activated in the third step, it will be able to receive frames that match the
programmed ID. At the end of a successful reception, the message buffer is updated by the MBM as
follows:
1. The value of the Free Running Timer is written into the Time Stamp field
2. The received ID, Data (8 bytes at most) and Length fields are stored
3. The Code field in the Control and Status word is updated (see Table 32-5 and Table 32-6 in
Section 32.4.3, Message buffer structure )
4. A status flag is set in the Interrupt Flag Register and an interrupt is generated if allowed by the
corresponding Interrupt Mask Register bit
Upon receiving the MB interrupt, the CPU should service the received frame using the following
procedure:
1. Read the Control and Status word (mandatory – activates an internal lock for this buffer)