NXP Semiconductors MPC5644A, Reference Manual, Page: 1297 / 1735

Deserial Serial Peripheral Interface (DSPI)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1297
Figure 30-32. DSI deserialization diagram
30.9.3.5 DSI transfer initiation control
Data transfers for a master DSPI in DSI configuration are initiated by a condition. The transfer initiation
conditions are selected by the TRRE and CID bits in the DSPI_DSICR.
Table 30-32 lists the four transfer
initiation conditions.
30.9.3.5.1 Continuous control
For Continuous Control a new DSI frame shifts out when the previous transfer cycle has completed and
the Delay after Transfer (t
DT
) has elapsed.
30.9.3.5.2 Change in data control
For Change in Data Control a transfer is initiated when the data to be serialized has changed since the
transfer of the last DSI frame. A copy of the previously transferred DSI data is stored in the
DSPI_COMPR. When the data selected for the transfer from the DSPI_SDR and DSPI_ASDR registers is
different from the data in the DSPI_COMPR a new DSI frame is transmitted. The MTRIG output signal
is asserted every time a change in data is detected.
Table 30-32. DSI data transfer initiation control
DSPI_DSICR bits
Transfer initiation control
TRRE CID
0 0 Continuous
0 1 Change in Data
1 0 Triggered
1 1 Triggered or Change in Data
SIN
Shift Register
0 1
N-1
Control
Logic
DSI Deserialization
Data Register
32 32
Parallel
Outputs
Slave Bus Interface
32
DSI Deserialized Data
Polarity Interrupt Register
DSI Deserialized Data
Interrupt Mask Register
DDIF