NXP Semiconductors MPC5644A, Reference Manual, Page: 127 / 1735

Device Performance Optimization
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 127
Using it is straightforward:
1. Select the appropriate compiler target and option to generate VLE code.
2. Configure the Memory Management Unit (MMU) to specify VLE attributes for the relevant MMU
pages. Refer to the register description in Section 6.3.6, Memory management unit (MMU) .
VLE-enabled cores run both Power Architecture and VLE instruction encodings on a page by page basis,
with pages defined by the MMU. The reduction is code size is typically between 25% and 30%.
6.5 Peripherals and general application guidelines
Optimizing the device configuration and compiler setup is only one part of optimizing an entire
application. Correct use of the peripherals can also dramatically improve overall system performance. In
particular, use of the interrupt controller, the enhanced Direct Memory Access (eDMA), and intelligent
peripherals such as the Enhanced Timer Processing unit (eTPU2), can off-load significant work from the
CPU.
For example, eDMA may be used to shift data to avoid unnecessary CPU loading. Most peripheral
modules can generate eDMA requests to trigger data transfers. An example of a typical application is to
use the eDMA to pass conversion commands to the analog to digital converter (ADC) ,while maintaining
circular buffers results of the ADC in the system RAM, with no core intervention.
Section 6.6, Performance optimization checklist provides several system level examples of how to
optimize an application.