NXP Semiconductors MPC5644A, Reference Manual, Page: 1215 / 1735

Decimation Filter
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1215
in the status register DECFILTER_MSR. If the ERREN bit is set in the DECFILTER_MCR configuration
register, this overrun asserts the module interrupt request.
26.5.15 Integrator
The hardware sample integrator accumulates the filter output values for determined periods.
26.5.15.1 Integrator inputs
T
he integrator can be fed either by raw or decimated filter outputs, selected by the DECFILTER_MXCR
bit SISEL (see Section 26.4.2.3, Decimation Filter Module Extended Configuration Register
(DECFILTER_MXCR) “). The accumulated input value taken can be the filtered sample “as is” (signaled),
or its absolute value, depending on the DECFILTER_MXCR bit SSIG.
NOTE
The integrator accumulates input samples when bypass is selected.
26.5.15.2 Integrator outputs
T
he integrator output is either:
• the 32-bit, fixed point unsigned accumulation of the absolute values from the filter output, when
the integrator is configured for absolute operation (DECFILTER_MXCR bit SSIG = 0). This
resolution allows a minimum of 131071 samples to be integrated before an overflow occurs in
absolute operation, or 65536 samples in signed operation.
• the 32-bit, fixed point signed two’s complement accumulation of the signed values from the filter
output, when the integrator is configured for signed operation (SSIG = 1).
The fractional part of the accumulation is 15 bits wide in both cases.
An accumulation overflow is flagged by the DECFILTER_MXSR bit SSOVF. The accumulator can
overflow in either of the ways below, selected through the DECFILTER_MXCR bit SSAT:
• saturated accumulation (SSAT = 1), so that an overflow results in the value of 0xFFFFFFFF for
absolute value accumulation (SSIG = 0), or 0x7FFFFFFF (positive) and 0x80000000 (negative)
for signaled accumulation (SSIG = 1).
• non-saturated accumulation (SSAT = 0), so that an overflow results in the modulo 2
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accumulation value. This operation is only allowed in absolute accumulation (SSIG = 0).
The integrator output value becomes available in register DECFILTER_FINTVAL (see Section 26.4.2.10,
Decimation Filter Final Integration Value Register (DECFILTER_FINTVAL) “) when an integrator output
request is issued. The integrator output request can be issued in the following ways:
• by hardware, controlled by an external signal; the enabling and the selection of the signal request
modes is done through the DECFILTER_MXCR field SRQSEL (see
Section 26.4.2.3, Decimation
Filter Module Extended Configuration Register (DECFILTER_MXCR) ”);
• by software, writing 1 to the DECFILTER_MXCR bit SRQ;
The SSOVF flag is asserted upon an integrator output request, based on the overflow state of the internal
accumulator. This internal overflow state is cleared upon an output request, just after SSOVF is asserted,
or upon an integrator reset (see
Section 26.5.15.3, Integrator reset ”). The internal overflow state is also