NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 20 System Integration Unit Lite (SIUL)
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 359
NOTE
16- and 32-bit accesses to the PCR x registers are supported.
In addition to the bit map above, the following Table 20-11 describes the PCR depending on the pad type
(pad types are defined in the “Pad types” section of this reference manual). The bits in shaded fields are
not implemented for the particular I/O type. The PA field selecting the number of alternate functions may
or may not be present depending on the number of alternate functions actually mapped on the pad.
Offsets: Base + 0x0040 (PCR0)(149 registers)
Base + 0x0042 (PCR1)
...
Base + 0x0168 (PCR148) Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0
SMC APC PA[1:0] OBE IBE
0 0
ODE
0 0
SRC WPE WPS
W
Reset 0 0
1
1
SMC and PA[1] are 1 for JTAG pads
0 0 0
1
0 0
2
2
OBE is 1 for TDO
0
3
3
IBE and WPE are 1 for TCK, TMS, TDI, FAB, and ABS
0 0 0 0 0 0 0
3
1
4
4
WPS is 0 for input only pad with analog feature and FAB
Figure 20-9. Pad Configuration Registers (PCRx)
Table 20-10. PCR bit implementation by pad type
Pad type
PCR bit No.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
S, M, F (Pad with
GPIO and digital
alternate
function) SMC APC PA[1:0] OBE IBE ODE SRC WPE WPS
Pad with slew rate
control SMC APC PA[1:0] OBE IBE ODE SRC WPE WPS
J (Pad with GPIO
and analog
functionality) SMC APC PA[1:0] OBE IBE ODE SRC WPE WPS
I (Pad dedicated
to ADC) SMC APC PA[1:0] OBE IBE ODE SRC WPE WPS
Table 20-11. PCRx field descriptions
Field Description
SMC Safe Mode Control.
This bit supports the overriding of the automatic deactivation of the output buffer of the associated
pad upon entering SAFE mode of the device.
0 In SAFE mode, the output buffer of the pad is disabled.
1 In SAFE mode, the output buffer remains functional.