NXP Semiconductors MPC5566, Reference Manual

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External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
12-22 Freescale Semiconductor
12.4.1.5 Memory Controller with Support for Various Memory Types
The EBI contains a memory controller that supports a variety of memory types, including
• Synchronous burst mode flash with external SRAM
• Asynchronous and legacy flash with external SRAM and a compatible interface
Each CS bank is configured via its own pair of base and option registers. Each time an internal to external
bus cycle access is requested, the internal address is compared with the base address of each valid base
register (17 bits are masked) as shown in
Figure 12-7 . If a match is found, the attributes defined for this
bank in its BR and OR are used to control the memory access. If a match is found in more than one bank,
the lowest bank matched handles the memory access. For example, bank zero is selected over bank one.
Figure 12-7. Bank Base Address and Match Structure
A match on a valid calibration chip select register overrides a match on any non-calibration chip select
register, with CAL_CS[0] having the highest priority. Thus the full priority of the chip selects is:
CAL_CS[0]....CAL_CS[3], and then CS[0]....CS[3]. When a match is found on one of the chip select
banks, all its attributes (from the appropriate base and option registers) are selected for the functional
operation of the external memory access, such as:
• Number of wait states for a single memory access, and for any beat in a burst access
• Burst enable
• Port size for the external accessed device
See the following sections for a full description of all chip select attributes:
• Section 12.3.1.6, “EBI Base Registers 0–3 (EBI_BRn) and EBI Calibration Base Registers 0–3
(EBI_CAL_BRn)
”
• Section 12.3.1.7, “EBI Option Registers 0–3 (EBI_ORn) and EBI Calibration Option Registers
0–3 (EBI_CAL_ORn)
”
BA
[0]
Comp
BA
[1]
Comp
BA
[2]
Comp
BA
[3]
Comp
BA
[4]
Comp
• • •
BA
[15]
Comp
BA
[16]
Comp
AM
[0]
AM
[1]
AM
[2]
AM
[3]
AM
[4]
AM
[5]
• • •
AM
[6]
AM
[16]
• • •
A[0:16]
AM[0:16]
Match
Address Mask Base Address
• • •