NXP Semiconductors MKW01Z128, Reference Manual, Page: 758 / 884

UARTx_C2 field descriptions (continued)
Field Description
This bit can be written to 1 to place the UART receiver in a standby state where it waits for automatic
hardware detection of a selected wakeup condition. The wakeup condition is an idle line between
messages, WAKE = 0, idle-line wakeup, or a logic 1 in the most significant data bit in a character, WAKE =
1, address-mark wakeup. Application software sets RWU and, normally, a selected hardware condition
automatically clears RWU.
0 Normal UART receiver operation.
1 UART receiver in standby waiting for wakeup condition.
0
SBK
Send Break
Writing a 1 and then a 0 to SBK queues a break character in the transmit data stream. Additional break
characters of 10 to 13, or 13 to 16 if BRK13 = 1, bit times of logic 0 are queued as long as SBK is set.
Depending on the timing of the set and clear of SBK relative to the information currently being transmitted,
a second break character may be queued before software clears SBK.
0 Normal transmitter operation.
1 Queue break character(s) to be sent.
32.2.5 UART Status Register 1 (UARTx_S1)
Address: Base a 4h offset
Bit 7 6 5 4 3 2 1 0
Read TDRE TC RDRF IDLE OR NF FE PF
Write w1c w1c w1c w1c w1c
Reset
1 1 0 0 0 0 0 0
UARTx_S1 field descriptions
Field Description
7
TDRE
Transmit Data Register Empty Flag
TDRE is set out of reset and whenever there is room to write data to the transmit data buffer. To clear
TDRE, write to the UART data register ( UART_D).
0 Transmit data buffer full.
1 Transmit data buffer empty.
6
TC
Transmission Complete Flag
TC is set out of reset and when TDRE is set and no data, preamble, or break character is being
transmitted.
TC is cleared automatically by one of the following:
• Write to the UART data register ( UART_D) to transmit new data
• Queue a preamble by changing TE from 0 to 1
• Queue a break character by writing 1 to UART_C2[SBK]
0 Transmitter active (sending data, a preamble, or a break).
1 Transmitter idle (transmission activity complete).
Table continues on the next page...
Chapter 32 Universal asynchronous receiver/transmitter (UART0)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 627