NXP Semiconductors MKW01Z128, Reference Manual, Page: 702 / 884

RTC_LR field descriptions (continued)
Field Description
0 Status Register is locked and writes are ignored.
1 Status Register is not locked and writes complete as normal.
4
CRL
Control Register Lock
After being cleared, this bit can only be set by POR.
0 Control Register is locked and writes are ignored.
1 Control Register is not locked and writes complete as normal.
3
TCL
Time Compensation Lock
After being cleared, this bit can be set only by POR or software reset.
0 Time Compensation Register is locked and writes are ignored.
1 Time Compensation Register is not locked and writes complete as normal.
Reserved This field is reserved.
This read-only field is reserved and always has the value 1.
30.2.8 RTC Interrupt Enable Register (RTC_IER)
Address: 4003_D000h base + 1Ch offset = 4003_D01Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
WPON
Reserved TSIE
Reserved
TAIE TOIE TIIE
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
RTC_IER field descriptions
Field Description
31–16
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
15–8
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
7
WPON
Wakeup Pin On
The wakeup pin is optional and not available on all devices. Whenever the wakeup pin is enabled and this
bit is set, the wakeup pin will assert.
Table continues on the next page...
Chapter 30 Real Time Clock (RTC)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 571